derek.holloway
7502bf64a4
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106 lines
3.0 KiB
YAML
106 lines
3.0 KiB
YAML
# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z16 -start-before=peephole-opt \
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# RUN: -stop-after=peephole-opt %s -o - | FileCheck %s
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--- |
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define double @f1(ptr %x, i32 %a, i32 %b, i32 %limit, ptr %dst) #0 {
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%arrayidx1 = getelementptr inbounds double, ptr %x, i64 1
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ret double 0.0
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}
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define double @f2(ptr %x, i32 %a, i32 %b, i32 %limit, ptr %dst) #0 {
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%arrayidx1 = getelementptr inbounds double, ptr %x, i64 1
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ret double 0.0
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}
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...
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# Do not fold where CC is live.
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# CHECK: name: f1
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# CHECK: {{.*}} WFADB
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---
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name: f1
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: addr64bit }
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- { id: 1, class: gr32bit }
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- { id: 2, class: gr32bit }
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- { id: 3, class: gr32bit }
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- { id: 4, class: addr64bit }
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- { id: 5, class: vr64bit }
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- { id: 6, class: vr64bit }
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- { id: 7, class: vr64bit }
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- { id: 8, class: grx32bit }
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liveins:
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- { reg: '$r2d', virtual-reg: '%0' }
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- { reg: '$r3l', virtual-reg: '%1' }
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- { reg: '$r4l', virtual-reg: '%2' }
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- { reg: '$r5l', virtual-reg: '%3' }
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- { reg: '$r6d', virtual-reg: '%4' }
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $r2d, $r3l, $r4l, $r5l, $r6d
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%4:addr64bit = COPY $r6d
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%3:gr32bit = COPY $r5l
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%2:gr32bit = COPY $r4l
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%1:gr32bit = COPY $r3l
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%0:addr64bit = COPY $r2d
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CLFIMux %3, 42, implicit-def $cc
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%5:vr64bit = VL64 %0, 0, $noreg :: (load (s64) from %ir.x)
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%6:vr64bit = VL64 %0, 8, $noreg :: (load (s64) from %ir.arrayidx1)
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%7:vr64bit = nsz arcp contract afn reassoc nofpexcept WFADB killed %6, killed %5, implicit $fpc
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%8:grx32bit = SELRMux %2, %1, 14, 4, implicit $cc
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STMux killed %8, %4, 0, $noreg :: (store (s32) into %ir.dst)
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$f0d = COPY %7
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Return implicit $f0d
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...
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# Do not fold where CC is live in.
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# CHECK: name: f2
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# CHECK: {{.*}} WFADB
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---
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name: f2
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: addr64bit }
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- { id: 1, class: gr32bit }
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- { id: 2, class: gr32bit }
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- { id: 3, class: gr32bit }
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- { id: 4, class: addr64bit }
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- { id: 5, class: vr64bit }
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- { id: 6, class: vr64bit }
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- { id: 7, class: vr64bit }
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- { id: 8, class: grx32bit }
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liveins:
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- { reg: '$r2d', virtual-reg: '%0' }
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- { reg: '$r3l', virtual-reg: '%1' }
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- { reg: '$r4l', virtual-reg: '%2' }
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- { reg: '$r5l', virtual-reg: '%3' }
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- { reg: '$r6d', virtual-reg: '%4' }
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $r2d, $r3l, $r4l, $r5l, $r6d, $cc
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%4:addr64bit = COPY $r6d
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%3:gr32bit = COPY $r5l
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%2:gr32bit = COPY $r4l
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%1:gr32bit = COPY $r3l
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%0:addr64bit = COPY $r2d
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%5:vr64bit = VL64 %0, 0, $noreg :: (load (s64) from %ir.x)
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%6:vr64bit = VL64 %0, 8, $noreg :: (load (s64) from %ir.arrayidx1)
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%7:vr64bit = nsz arcp contract afn reassoc nofpexcept WFADB killed %6, killed %5, implicit $fpc
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%8:grx32bit = SELRMux %2, %1, 14, 4, implicit $cc
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STMux killed %8, %4, 0, $noreg :: (store (s32) into %ir.dst)
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$f0d = COPY %7
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Return implicit $f0d
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...
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