derek.holloway
7502bf64a4
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361 lines
12 KiB
LLVM
361 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 | FileCheck %s --check-prefix=LE
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; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 | FileCheck %s --check-prefix=BE
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; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 | FileCheck %s --check-prefix=LE-FP16
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; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 | FileCheck %s --check-prefix=BE-FP16
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;; Global ISel successfully generates code for some functions for little-endian
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;; without +fullfp16, and falls back to SelectionDAG in all others.
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; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=LE-GISEL
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; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=BE
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; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=LE-FP16
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; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=BE-FP16
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define arm_aapcscc half @callee_soft_half_in_reg(half %f) {
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; LE-LABEL: callee_soft_half_in_reg:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: bx lr
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;
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; BE-LABEL: callee_soft_half_in_reg:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: bx lr
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;
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; LE-FP16-LABEL: callee_soft_half_in_reg:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: vmov.f16 s0, r0
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; LE-FP16-NEXT: vmov r0, s0
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; LE-FP16-NEXT: bx lr
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;
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; BE-FP16-LABEL: callee_soft_half_in_reg:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: vmov.f16 s0, r0
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; BE-FP16-NEXT: vmov r0, s0
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; BE-FP16-NEXT: bx lr
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;
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; LE-GISEL-LABEL: callee_soft_half_in_reg:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: bx lr
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entry:
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ret half %f
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}
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define void @caller_soft_half_in_reg() {
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; LE-LABEL: caller_soft_half_in_reg:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: .save {r7, lr}
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; LE-NEXT: push {r7, lr}
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; LE-NEXT: mov.w r0, #15360
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; LE-NEXT: bl callee_soft_half_in_reg
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; LE-NEXT: pop {r7, pc}
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;
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; BE-LABEL: caller_soft_half_in_reg:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: .save {r7, lr}
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; BE-NEXT: push {r7, lr}
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; BE-NEXT: mov.w r0, #15360
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; BE-NEXT: bl callee_soft_half_in_reg
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; BE-NEXT: pop {r7, pc}
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;
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; LE-FP16-LABEL: caller_soft_half_in_reg:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: .save {r7, lr}
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; LE-FP16-NEXT: push {r7, lr}
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; LE-FP16-NEXT: mov.w r0, #15360
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; LE-FP16-NEXT: bl callee_soft_half_in_reg
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; LE-FP16-NEXT: pop {r7, pc}
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;
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; BE-FP16-LABEL: caller_soft_half_in_reg:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: .save {r7, lr}
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; BE-FP16-NEXT: push {r7, lr}
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; BE-FP16-NEXT: mov.w r0, #15360
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; BE-FP16-NEXT: bl callee_soft_half_in_reg
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; BE-FP16-NEXT: pop {r7, pc}
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;
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; LE-GISEL-LABEL: caller_soft_half_in_reg:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: .save {r7, lr}
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; LE-GISEL-NEXT: push {r7, lr}
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; LE-GISEL-NEXT: mov.w r0, #15360
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; LE-GISEL-NEXT: bl callee_soft_half_in_reg
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; LE-GISEL-NEXT: pop {r7, pc}
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entry:
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%ret = call arm_aapcscc half @callee_soft_half_in_reg(half 1.0)
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ret void
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}
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define arm_aapcscc half @callee_soft_half_on_stack(float %r0, float %r1, float %r2, float %r3, half %f) {
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; LE-LABEL: callee_soft_half_on_stack:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: ldr r0, [sp]
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; LE-NEXT: bx lr
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;
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; BE-LABEL: callee_soft_half_on_stack:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: ldr r0, [sp]
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; BE-NEXT: bx lr
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;
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; LE-FP16-LABEL: callee_soft_half_on_stack:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: vldr.16 s0, [sp]
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; LE-FP16-NEXT: vmov r0, s0
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; LE-FP16-NEXT: bx lr
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;
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; BE-FP16-LABEL: callee_soft_half_on_stack:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: vldr.16 s0, [sp, #2]
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; BE-FP16-NEXT: vmov r0, s0
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; BE-FP16-NEXT: bx lr
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;
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; LE-GISEL-LABEL: callee_soft_half_on_stack:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: mov r0, sp
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; LE-GISEL-NEXT: ldr r0, [r0]
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; LE-GISEL-NEXT: bx lr
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entry:
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ret half %f
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}
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define void @caller_soft_half_on_stack() {
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; LE-LABEL: caller_soft_half_on_stack:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: .save {r7, lr}
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; LE-NEXT: push {r7, lr}
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; LE-NEXT: .pad #8
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; LE-NEXT: sub sp, #8
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; LE-NEXT: mov.w r0, #15360
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; LE-NEXT: str r0, [sp]
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; LE-NEXT: bl callee_soft_half_on_stack
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; LE-NEXT: add sp, #8
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; LE-NEXT: pop {r7, pc}
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;
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; BE-LABEL: caller_soft_half_on_stack:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: .save {r7, lr}
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; BE-NEXT: push {r7, lr}
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; BE-NEXT: .pad #8
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; BE-NEXT: sub sp, #8
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; BE-NEXT: mov.w r0, #15360
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; BE-NEXT: str r0, [sp]
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; BE-NEXT: bl callee_soft_half_on_stack
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; BE-NEXT: add sp, #8
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; BE-NEXT: pop {r7, pc}
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;
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; LE-FP16-LABEL: caller_soft_half_on_stack:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: .save {r7, lr}
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; LE-FP16-NEXT: push {r7, lr}
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; LE-FP16-NEXT: .pad #8
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; LE-FP16-NEXT: sub sp, #8
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; LE-FP16-NEXT: mov.w r0, #15360
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; LE-FP16-NEXT: str r0, [sp]
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; LE-FP16-NEXT: bl callee_soft_half_on_stack
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; LE-FP16-NEXT: add sp, #8
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; LE-FP16-NEXT: pop {r7, pc}
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;
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; BE-FP16-LABEL: caller_soft_half_on_stack:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: .save {r7, lr}
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; BE-FP16-NEXT: push {r7, lr}
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; BE-FP16-NEXT: .pad #8
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; BE-FP16-NEXT: sub sp, #8
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; BE-FP16-NEXT: mov.w r0, #15360
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; BE-FP16-NEXT: str r0, [sp]
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; BE-FP16-NEXT: bl callee_soft_half_on_stack
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; BE-FP16-NEXT: add sp, #8
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; BE-FP16-NEXT: pop {r7, pc}
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;
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; LE-GISEL-LABEL: caller_soft_half_on_stack:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: .save {r7, lr}
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; LE-GISEL-NEXT: push {r7, lr}
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; LE-GISEL-NEXT: .pad #8
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; LE-GISEL-NEXT: sub sp, #8
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; LE-GISEL-NEXT: mov.w r0, #15360
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; LE-GISEL-NEXT: str r0, [sp]
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; LE-GISEL-NEXT: bl callee_soft_half_on_stack
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; LE-GISEL-NEXT: add sp, #8
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; LE-GISEL-NEXT: pop {r7, pc}
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entry:
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%ret = call arm_aapcscc half @callee_soft_half_on_stack(float poison, float poison, float poison, float poison, half 1.0)
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ret void
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}
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define arm_aapcs_vfpcc half @callee_hard_half_in_reg(half %f) {
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; LE-LABEL: callee_hard_half_in_reg:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: bx lr
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;
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; BE-LABEL: callee_hard_half_in_reg:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: bx lr
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;
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; LE-FP16-LABEL: callee_hard_half_in_reg:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: bx lr
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;
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; BE-FP16-LABEL: callee_hard_half_in_reg:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: bx lr
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;
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; LE-GISEL-LABEL: callee_hard_half_in_reg:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: bx lr
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entry:
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ret half %f
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}
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define void @caller_hard_half_in_reg() {
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; LE-LABEL: caller_hard_half_in_reg:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: .save {r7, lr}
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; LE-NEXT: push {r7, lr}
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; LE-NEXT: vldr s0, .LCPI5_0
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; LE-NEXT: bl callee_hard_half_in_reg
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; LE-NEXT: pop {r7, pc}
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; LE-NEXT: .p2align 2
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; LE-NEXT: @ %bb.1:
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; LE-NEXT: .LCPI5_0:
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; LE-NEXT: .long 0x00003c00 @ float 2.15239444E-41
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;
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; BE-LABEL: caller_hard_half_in_reg:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: .save {r7, lr}
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; BE-NEXT: push {r7, lr}
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; BE-NEXT: vldr s0, .LCPI5_0
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; BE-NEXT: bl callee_hard_half_in_reg
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; BE-NEXT: pop {r7, pc}
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; BE-NEXT: .p2align 2
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; BE-NEXT: @ %bb.1:
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; BE-NEXT: .LCPI5_0:
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; BE-NEXT: .long 0x00003c00 @ float 2.15239444E-41
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;
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; LE-FP16-LABEL: caller_hard_half_in_reg:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: .save {r7, lr}
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; LE-FP16-NEXT: push {r7, lr}
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; LE-FP16-NEXT: vmov.f16 s0, #1.000000e+00
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; LE-FP16-NEXT: bl callee_hard_half_in_reg
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; LE-FP16-NEXT: pop {r7, pc}
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;
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; BE-FP16-LABEL: caller_hard_half_in_reg:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: .save {r7, lr}
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; BE-FP16-NEXT: push {r7, lr}
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; BE-FP16-NEXT: vmov.f16 s0, #1.000000e+00
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; BE-FP16-NEXT: bl callee_hard_half_in_reg
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; BE-FP16-NEXT: pop {r7, pc}
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;
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; LE-GISEL-LABEL: caller_hard_half_in_reg:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: .save {r7, lr}
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; LE-GISEL-NEXT: push {r7, lr}
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; LE-GISEL-NEXT: vldr s0, .LCPI5_0
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; LE-GISEL-NEXT: bl callee_hard_half_in_reg
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; LE-GISEL-NEXT: pop {r7, pc}
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; LE-GISEL-NEXT: .p2align 2
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; LE-GISEL-NEXT: @ %bb.1:
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; LE-GISEL-NEXT: .LCPI5_0:
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; LE-GISEL-NEXT: .long 0x00003c00 @ float 2.15239444E-41
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entry:
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%ret = call arm_aapcs_vfpcc half @callee_hard_half_in_reg(half 1.0)
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ret void
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}
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define arm_aapcs_vfpcc half @callee_hard_half_on_stack(float %s0, float %s1, float %s2, float %s3, float %s4, float %s5, float %s6, float %s7,float %s8, float %s9, float %s10, float %s11, float %s12, float %s13, float %s14, float %s15, half %f) {
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; LE-LABEL: callee_hard_half_on_stack:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: vldr s0, [sp]
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; LE-NEXT: bx lr
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;
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; BE-LABEL: callee_hard_half_on_stack:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: vldr s0, [sp]
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; BE-NEXT: bx lr
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;
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; LE-FP16-LABEL: callee_hard_half_on_stack:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: vldr.16 s0, [sp]
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; LE-FP16-NEXT: bx lr
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;
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; BE-FP16-LABEL: callee_hard_half_on_stack:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: vldr.16 s0, [sp, #2]
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; BE-FP16-NEXT: bx lr
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;
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; LE-GISEL-LABEL: callee_hard_half_on_stack:
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; LE-GISEL: @ %bb.0: @ %entry
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; LE-GISEL-NEXT: mov r0, sp
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; LE-GISEL-NEXT: ldr r0, [r0]
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; LE-GISEL-NEXT: vmov s0, r0
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; LE-GISEL-NEXT: bx lr
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entry:
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ret half %f
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}
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define void @caller_hard_half_on_stack() {
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; LE-LABEL: caller_hard_half_on_stack:
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; LE: @ %bb.0: @ %entry
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; LE-NEXT: .save {r7, lr}
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; LE-NEXT: push {r7, lr}
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; LE-NEXT: .pad #8
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; LE-NEXT: sub sp, #8
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; LE-NEXT: mov.w r0, #15360
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; LE-NEXT: str r0, [sp]
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; LE-NEXT: bl callee_hard_half_on_stack
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; LE-NEXT: add sp, #8
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; LE-NEXT: pop {r7, pc}
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;
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; BE-LABEL: caller_hard_half_on_stack:
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; BE: @ %bb.0: @ %entry
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; BE-NEXT: .save {r7, lr}
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; BE-NEXT: push {r7, lr}
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; BE-NEXT: .pad #8
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; BE-NEXT: sub sp, #8
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; BE-NEXT: mov.w r0, #15360
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; BE-NEXT: str r0, [sp]
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; BE-NEXT: bl callee_hard_half_on_stack
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; BE-NEXT: add sp, #8
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; BE-NEXT: pop {r7, pc}
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;
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; LE-FP16-LABEL: caller_hard_half_on_stack:
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; LE-FP16: @ %bb.0: @ %entry
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; LE-FP16-NEXT: .save {r7, lr}
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; LE-FP16-NEXT: push {r7, lr}
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; LE-FP16-NEXT: .pad #8
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; LE-FP16-NEXT: sub sp, #8
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; LE-FP16-NEXT: mov.w r0, #15360
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; LE-FP16-NEXT: str r0, [sp]
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; LE-FP16-NEXT: bl callee_hard_half_on_stack
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; LE-FP16-NEXT: add sp, #8
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|
; LE-FP16-NEXT: pop {r7, pc}
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|
;
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; BE-FP16-LABEL: caller_hard_half_on_stack:
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; BE-FP16: @ %bb.0: @ %entry
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; BE-FP16-NEXT: .save {r7, lr}
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|
; BE-FP16-NEXT: push {r7, lr}
|
|
; BE-FP16-NEXT: .pad #8
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|
; BE-FP16-NEXT: sub sp, #8
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|
; BE-FP16-NEXT: mov.w r0, #15360
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|
; BE-FP16-NEXT: str r0, [sp]
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|
; BE-FP16-NEXT: bl callee_hard_half_on_stack
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|
; BE-FP16-NEXT: add sp, #8
|
|
; BE-FP16-NEXT: pop {r7, pc}
|
|
;
|
|
; LE-GISEL-LABEL: caller_hard_half_on_stack:
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|
; LE-GISEL: @ %bb.0: @ %entry
|
|
; LE-GISEL-NEXT: .save {r7, lr}
|
|
; LE-GISEL-NEXT: push {r7, lr}
|
|
; LE-GISEL-NEXT: .pad #8
|
|
; LE-GISEL-NEXT: sub sp, #8
|
|
; LE-GISEL-NEXT: mov.w r0, #15360
|
|
; LE-GISEL-NEXT: str r0, [sp]
|
|
; LE-GISEL-NEXT: bl callee_hard_half_on_stack
|
|
; LE-GISEL-NEXT: add sp, #8
|
|
; LE-GISEL-NEXT: pop {r7, pc}
|
|
entry:
|
|
%ret = call arm_aapcs_vfpcc half @callee_hard_half_on_stack(float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, half 1.0)
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|
ret void
|
|
}
|