derek.holloway
7502bf64a4
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92 lines
3.3 KiB
LLVM
92 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8.1m.main-arm-none-eabi"
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%"struct.std::__va_list" = type { ptr }
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define hidden i32 @_Z1fiz(i32 %n, ...) local_unnamed_addr #0 {
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; CHECK-LABEL: _Z1fiz:
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; CHECK: .cfi_sections .debug_frame
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; CHECK-NEXT: .cfi_startproc
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; CHECK-NEXT: @ %bb.0: @ %entry
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; CHECK-NEXT: pac r12, lr, sp
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; CHECK-NEXT: .pad #12
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; CHECK-NEXT: sub sp, #12
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; CHECK-NEXT: .cfi_def_cfa_offset 12
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; CHECK-NEXT: .save {r7, ra_auth_code, lr}
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; CHECK-NEXT: push.w {r7, r12, lr}
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: .cfi_offset lr, -16
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; CHECK-NEXT: .cfi_offset ra_auth_code, -20
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; CHECK-NEXT: .cfi_offset r7, -24
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; CHECK-NEXT: .pad #4
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; CHECK-NEXT: sub sp, #4
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; CHECK-NEXT: .cfi_def_cfa_offset 28
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; CHECK-NEXT: add.w r12, sp, #16
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; CHECK-NEXT: cmp r0, #1
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; CHECK-NEXT: stm.w r12, {r1, r2, r3}
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; CHECK-NEXT: add r1, sp, #16
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; CHECK-NEXT: str r1, [sp]
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; CHECK-NEXT: blt .LBB0_3
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; CHECK-NEXT: @ %bb.1: @ %for.body.lr.ph
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; CHECK-NEXT: ldr r1, [sp]
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; CHECK-NEXT: dls lr, r0
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: adds r1, #4
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; CHECK-NEXT: .LBB0_2: @ %for.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: str r1, [sp]
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; CHECK-NEXT: ldr r2, [r1, #-4]
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; CHECK-NEXT: adds r1, #4
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; CHECK-NEXT: add r0, r2
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; CHECK-NEXT: le lr, .LBB0_2
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; CHECK-NEXT: b .LBB0_4
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; CHECK-NEXT: .LBB0_3:
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: .LBB0_4: @ %for.cond.cleanup
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: pop.w {r7, r12, lr}
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; CHECK-NEXT: add sp, #12
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; CHECK-NEXT: aut r12, lr, sp
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; CHECK-NEXT: bx lr
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entry:
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%ap = alloca %"struct.std::__va_list", align 4
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call void @llvm.va_start(ptr nonnull %ap)
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%cmp7 = icmp sgt i32 %n, 0
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br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup
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for.body.lr.ph: ; preds = %entry
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%argp.cur.pre = load ptr, ptr %ap, align 4
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
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call void @llvm.va_end(ptr nonnull %ap)
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ret i32 %s.0.lcssa
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for.body: ; preds = %for.body.lr.ph, %for.body
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%argp.cur = phi ptr [ %argp.cur.pre, %for.body.lr.ph ], [ %argp.next, %for.body ]
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%i.09 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%s.08 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 4
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store ptr %argp.next, ptr %ap, align 4
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%0 = load i32, ptr %argp.cur, align 4
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%add = add nsw i32 %0, %s.08
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%inc = add nuw nsw i32 %i.09, 1
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%exitcond.not = icmp eq i32 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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declare void @llvm.va_start(ptr) #1
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declare void @llvm.va_end(ptr) #1
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attributes #0 = { nounwind optsize "sign-return-address"="non-leaf" }
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attributes #1 = { nounwind "sign-return-address"="non-leaf" }
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!llvm.module.flags = !{!0, !1, !2}
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!0 = !{i32 8, !"branch-target-enforcement", i32 0}
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!1 = !{i32 8, !"sign-return-address", i32 1}
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!2 = !{i32 8, !"sign-return-address-all", i32 0}
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