derek.holloway
7502bf64a4
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30 lines
1.5 KiB
LLVM
30 lines
1.5 KiB
LLVM
; RUN: llc < %s -mattr=+simd128 -verify-machineinstrs
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target triple = "wasm32-unknown-unknown"
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; After DAG legalization, in SelectionDAG optimization phase, ISel runs
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; DAGCombiner on each node, among which SimplifyDemandedVectorElts turns unused
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; vector elements into undefs. And in order to make sure the DAG is in a
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; legalized state, it runs legalization again, which runs our custom
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; LowerBUILD_VECTOR, which converts undefs into zeros, causing an infinite loop.
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; We prevent this from happening by creating a custom hook , which allows us to
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; bail out of SimplifyDemandedVectorElts after legalization.
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; This is a reduced test case from a bug reproducer reported. This should not
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; hang.
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define void @test(i8 %0) {
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%2 = insertelement <4 x i8> <i8 -1, i8 -1, i8 -1, i8 poison>, i8 %0, i64 3
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%3 = zext <4 x i8> %2 to <4 x i32>
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%4 = mul nuw nsw <4 x i32> %3, <i32 257, i32 257, i32 257, i32 257>
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%5 = add nuw nsw <4 x i32> %4, <i32 1, i32 1, i32 1, i32 1>
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%6 = lshr <4 x i32> %5, <i32 1, i32 1, i32 1, i32 1>
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%7 = mul nuw nsw <4 x i32> %6, <i32 20000, i32 20000, i32 20000, i32 20000>
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%8 = add nuw nsw <4 x i32> %7, <i32 32768, i32 32768, i32 32768, i32 32768>
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%9 = and <4 x i32> %8, <i32 2147418112, i32 2147418112, i32 2147418112, i32 2147418112>
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%10 = sub nsw <4 x i32> <i32 655360000, i32 655360000, i32 655360000, i32 655360000>, %9
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%11 = ashr exact <4 x i32> %10, <i32 16, i32 16, i32 16, i32 16>
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%12 = trunc <4 x i32> %11 to <4 x i16>
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store <4 x i16> %12, ptr undef, align 4
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ret void
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}
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