derek.holloway
7502bf64a4
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600 lines
19 KiB
LLVM
600 lines
19 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
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define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
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; CHECK-LABEL: adc8rr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
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; CHECK-NEXT: adcb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0xf7]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i8 %a, %b
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%k = icmp ugt i8 %x, %y
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%z = zext i1 %k to i8
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%r = add i8 %s, %z
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ret i8 %r
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}
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define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: adc16rr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
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; CHECK-NEXT: adcw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0xf7]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i16 %a, %b
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%k = icmp ugt i16 %x, %y
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%z = zext i1 %k to i16
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%r = add i16 %s, %z
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ret i16 %r
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}
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define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: adc32rr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
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; CHECK-NEXT: adcl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0xf7]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i32 %a, %b
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%k = icmp ugt i32 %x, %y
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%z = zext i1 %k to i32
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%r = add i32 %s, %z
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ret i32 %r
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}
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define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: adc64rr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
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; CHECK-NEXT: adcq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0xf7]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i64 %a, %b
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%k = icmp ugt i64 %x, %y
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%z = zext i1 %k to i64
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%r = add i64 %s, %z
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ret i64 %r
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}
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define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
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; NDD-LABEL: adc8rm:
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; NDD: # %bb.0:
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; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
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; NDD-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
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; NDD-NEXT: adcb (%rsi), %al # encoding: [0x12,0x06]
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; NDD-NEXT: # kill: def $al killed $al killed $eax
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc8rm:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
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; MEM-NEXT: adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i8, ptr %ptr
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%s = add i8 %a, %b
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%k = icmp ugt i8 %x, %y
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%z = zext i1 %k to i8
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%r = add i8 %s, %z
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ret i8 %r
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}
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define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
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; NDD-LABEL: adc16rm:
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; NDD: # %bb.0:
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; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
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; NDD-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
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; NDD-NEXT: adcw (%rsi), %ax # encoding: [0x66,0x13,0x06]
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; NDD-NEXT: # kill: def $ax killed $ax killed $eax
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc16rm:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
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; MEM-NEXT: adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i16, ptr %ptr
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%s = add i16 %a, %b
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%k = icmp ugt i16 %x, %y
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%z = zext i1 %k to i16
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%r = add i16 %s, %z
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ret i16 %r
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}
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define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
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; NDD-LABEL: adc32rm:
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; NDD: # %bb.0:
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; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
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; NDD-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
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; NDD-NEXT: adcl (%rsi), %eax # encoding: [0x13,0x06]
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc32rm:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
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; MEM-NEXT: adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i32, ptr %ptr
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%s = add i32 %a, %b
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%k = icmp ugt i32 %x, %y
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%z = zext i1 %k to i32
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%r = add i32 %s, %z
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ret i32 %r
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}
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define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
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; NDD-LABEL: adc64rm:
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; NDD: # %bb.0:
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; NDD-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
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; NDD-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
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; NDD-NEXT: adcq (%rsi), %rax # encoding: [0x48,0x13,0x06]
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc64rm:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
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; MEM-NEXT: adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i64, ptr %ptr
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%s = add i64 %a, %b
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%k = icmp ugt i64 %x, %y
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%z = zext i1 %k to i64
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%r = add i64 %s, %z
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ret i64 %r
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}
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define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: adc16ri8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
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; CHECK-NEXT: adcw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd7,0x7b]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i16 %a, 123
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%k = icmp ugt i16 %x, %y
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%z = zext i1 %k to i16
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%r = add i16 %s, %z
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ret i16 %r
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}
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define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: adc32ri8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
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; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xd7,0x7b]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i32 %a, 123
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%k = icmp ugt i32 %x, %y
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%z = zext i1 %k to i32
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%r = add i32 %s, %z
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ret i32 %r
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}
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define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: adc64ri8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
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; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xd7,0x7b]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i64 %a, 123
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%k = icmp ugt i64 %x, %y
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%z = zext i1 %k to i64
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%r = add i64 %s, %z
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ret i64 %r
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}
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define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind {
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; CHECK-LABEL: adc8ri:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
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; CHECK-NEXT: adcb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xd7,0x7b]
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i8 %a, 123
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%k = icmp ugt i8 %x, %y
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%z = zext i1 %k to i8
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%r = add i8 %s, %z
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ret i8 %r
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}
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define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: adc16ri:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
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; CHECK-NEXT: adcw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0xd2,0x04]
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; CHECK-NEXT: # imm = 0x4D2
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i16 %a, 1234
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%k = icmp ugt i16 %x, %y
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%z = zext i1 %k to i16
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%r = add i16 %s, %z
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ret i16 %r
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}
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define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: adc32ri:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
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; CHECK-NEXT: adcl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00]
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; CHECK-NEXT: # imm = 0x1E240
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i32 %a, 123456
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%k = icmp ugt i32 %x, %y
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%z = zext i1 %k to i32
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%r = add i32 %s, %z
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ret i32 %r
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}
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define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: adc64ri:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
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; CHECK-NEXT: adcq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00]
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; CHECK-NEXT: # imm = 0x1E240
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; CHECK-NEXT: retq # encoding: [0xc3]
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%s = add i64 %a, 123456
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%k = icmp ugt i64 %x, %y
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%z = zext i1 %k to i64
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%r = add i64 %s, %z
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ret i64 %r
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}
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define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
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; NDD-LABEL: adc8mr:
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; NDD: # %bb.0:
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; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
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; NDD-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
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; NDD-NEXT: adcb (%rsi), %al # encoding: [0x12,0x06]
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; NDD-NEXT: # kill: def $al killed $al killed $eax
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc8mr:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
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; MEM-NEXT: adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i8, ptr %ptr
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%s = add i8 %b, %a
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%k = icmp ugt i8 %x, %y
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%z = zext i1 %k to i8
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%r = add i8 %s, %z
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ret i8 %r
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}
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define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
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; NDD-LABEL: adc16mr:
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; NDD: # %bb.0:
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; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
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; NDD-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
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; NDD-NEXT: adcw (%rsi), %ax # encoding: [0x66,0x13,0x06]
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; NDD-NEXT: # kill: def $ax killed $ax killed $eax
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc16mr:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
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; MEM-NEXT: adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i16, ptr %ptr
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%s = add i16 %b, %a
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%k = icmp ugt i16 %x, %y
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%z = zext i1 %k to i16
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%r = add i16 %s, %z
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ret i16 %r
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}
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define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
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; NDD-LABEL: adc32mr:
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; NDD: # %bb.0:
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; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
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; NDD-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
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; NDD-NEXT: adcl (%rsi), %eax # encoding: [0x13,0x06]
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; NDD-NEXT: retq # encoding: [0xc3]
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;
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; MEM-LABEL: adc32mr:
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; MEM: # %bb.0:
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; MEM-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
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; MEM-NEXT: adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e]
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; MEM-NEXT: retq # encoding: [0xc3]
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%b = load i32, ptr %ptr
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%s = add i32 %b, %a
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%k = icmp ugt i32 %x, %y
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%z = zext i1 %k to i32
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%r = add i32 %s, %z
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ret i32 %r
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}
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define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
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; NDD-LABEL: adc64mr:
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; NDD: # %bb.0:
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; NDD-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
|
|
; NDD-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
|
|
; NDD-NEXT: adcq (%rsi), %rax # encoding: [0x48,0x13,0x06]
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc64mr:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
|
|
; MEM-NEXT: adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e]
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%b = load i64, ptr %ptr
|
|
%s = add i64 %b, %a
|
|
%k = icmp ugt i64 %x, %y
|
|
%z = zext i1 %k to i64
|
|
%r = add i64 %s, %z
|
|
ret i64 %r
|
|
}
|
|
|
|
define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
|
|
; NDD-LABEL: adc16mi8:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
|
|
; NDD-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
|
|
; NDD-NEXT: adcw $123, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x83,0xd0,0x7b]
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc16mi8:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
|
|
; MEM-NEXT: adcw $123, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x7b]
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i16, ptr %ptr
|
|
%s = add i16 %a, 123
|
|
%k = icmp ugt i16 %x, %y
|
|
%z = zext i1 %k to i16
|
|
%r = add i16 %s, %z
|
|
ret i16 %r
|
|
}
|
|
|
|
define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
|
|
; NDD-LABEL: adc32mi8:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]
|
|
; NDD-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
|
|
; NDD-NEXT: adcl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xd0,0x7b]
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc32mi8:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
|
|
; MEM-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x17,0x7b]
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i32, ptr %ptr
|
|
%s = add i32 %a, 123
|
|
%k = icmp ugt i32 %x, %y
|
|
%z = zext i1 %k to i32
|
|
%r = add i32 %s, %z
|
|
ret i32 %r
|
|
}
|
|
|
|
define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
|
|
; NDD-LABEL: adc64mi8:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
|
|
; NDD-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
|
|
; NDD-NEXT: adcq $123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xd0,0x7b]
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc64mi8:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
|
|
; MEM-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x17,0x7b]
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i64, ptr %ptr
|
|
%s = add i64 %a, 123
|
|
%k = icmp ugt i64 %x, %y
|
|
%z = zext i1 %k to i64
|
|
%r = add i64 %s, %z
|
|
ret i64 %r
|
|
}
|
|
|
|
define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
|
|
; NDD-LABEL: adc8mi:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movzbl (%rdi), %eax # encoding: [0x0f,0xb6,0x07]
|
|
; NDD-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
|
|
; NDD-NEXT: adcb $123, %al # EVEX TO LEGACY Compression encoding: [0x14,0x7b]
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc8mi:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
|
|
; MEM-NEXT: adcb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x17,0x7b]
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i8, ptr %ptr
|
|
%s = add i8 %a, 123
|
|
%k = icmp ugt i8 %x, %y
|
|
%z = zext i1 %k to i8
|
|
%r = add i8 %s, %z
|
|
ret i8 %r
|
|
}
|
|
|
|
define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
|
|
; NDD-LABEL: adc16mi:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
|
|
; NDD-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
|
|
; NDD-NEXT: adcw $1234, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x15,0xd2,0x04]
|
|
; NDD-NEXT: # imm = 0x4D2
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc16mi:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
|
|
; MEM-NEXT: adcw $1234, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0xd2,0x04]
|
|
; MEM-NEXT: # imm = 0x4D2
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i16, ptr %ptr
|
|
%s = add i16 %a, 1234
|
|
%k = icmp ugt i16 %x, %y
|
|
%z = zext i1 %k to i16
|
|
%r = add i16 %s, %z
|
|
ret i16 %r
|
|
}
|
|
|
|
define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
|
|
; NDD-LABEL: adc32mi:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]
|
|
; NDD-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
|
|
; NDD-NEXT: adcl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x15,0x40,0xe2,0x01,0x00]
|
|
; NDD-NEXT: # imm = 0x1E240
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc32mi:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
|
|
; MEM-NEXT: adcl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x40,0xe2,0x01,0x00]
|
|
; MEM-NEXT: # imm = 0x1E240
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i32, ptr %ptr
|
|
%s = add i32 %a, 123456
|
|
%k = icmp ugt i32 %x, %y
|
|
%z = zext i1 %k to i32
|
|
%r = add i32 %s, %z
|
|
ret i32 %r
|
|
}
|
|
|
|
define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
|
|
; NDD-LABEL: adc64mi:
|
|
; NDD: # %bb.0:
|
|
; NDD-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
|
|
; NDD-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
|
|
; NDD-NEXT: adcq $123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x15,0x40,0xe2,0x01,0x00]
|
|
; NDD-NEXT: # imm = 0x1E240
|
|
; NDD-NEXT: retq # encoding: [0xc3]
|
|
;
|
|
; MEM-LABEL: adc64mi:
|
|
; MEM: # %bb.0:
|
|
; MEM-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
|
|
; MEM-NEXT: adcq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x40,0xe2,0x01,0x00]
|
|
; MEM-NEXT: # imm = 0x1E240
|
|
; MEM-NEXT: retq # encoding: [0xc3]
|
|
%a = load i64, ptr %ptr
|
|
%s = add i64 %a, 123456
|
|
%k = icmp ugt i64 %x, %y
|
|
%z = zext i1 %k to i64
|
|
%r = add i64 %s, %z
|
|
ret i64 %r
|
|
}
|
|
|
|
define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
|
|
; CHECK-LABEL: adc8mr_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
|
|
; CHECK-NEXT: adcb %dil, (%rsi) # encoding: [0x40,0x10,0x3e]
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%b = load i8, ptr %ptr
|
|
%s = add i8 %b, %a
|
|
%k = icmp ugt i8 %x, %y
|
|
%z = zext i1 %k to i8
|
|
%r = add i8 %s, %z
|
|
store i8 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
|
|
; CHECK-LABEL: adc16mr_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
|
|
; CHECK-NEXT: adcw %di, (%rsi) # encoding: [0x66,0x11,0x3e]
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%b = load i16, ptr %ptr
|
|
%s = add i16 %b, %a
|
|
%k = icmp ugt i16 %x, %y
|
|
%z = zext i1 %k to i16
|
|
%r = add i16 %s, %z
|
|
store i16 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
|
|
; CHECK-LABEL: adc32mr_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
|
|
; CHECK-NEXT: adcl %edi, (%rsi) # encoding: [0x11,0x3e]
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%b = load i32, ptr %ptr
|
|
%s = add i32 %b, %a
|
|
%k = icmp ugt i32 %x, %y
|
|
%z = zext i1 %k to i32
|
|
%r = add i32 %s, %z
|
|
store i32 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
|
|
; CHECK-LABEL: adc64mr_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
|
|
; CHECK-NEXT: adcq %rdi, (%rsi) # encoding: [0x48,0x11,0x3e]
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%b = load i64, ptr %ptr
|
|
%s = add i64 %b, %a
|
|
%k = icmp ugt i64 %x, %y
|
|
%z = zext i1 %k to i64
|
|
%r = add i64 %s, %z
|
|
store i64 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind {
|
|
; CHECK-LABEL: adc8mi_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
|
|
; CHECK-NEXT: adcb $123, (%rdi) # encoding: [0x80,0x17,0x7b]
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%a = load i8, ptr %ptr
|
|
%s = add i8 %a, 123
|
|
%k = icmp ugt i8 %x, %y
|
|
%z = zext i1 %k to i8
|
|
%r = add i8 %s, %z
|
|
store i8 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
|
|
; CHECK-LABEL: adc16mi_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
|
|
; CHECK-NEXT: adcw $1234, (%rdi) # encoding: [0x66,0x81,0x17,0xd2,0x04]
|
|
; CHECK-NEXT: # imm = 0x4D2
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%a = load i16, ptr %ptr
|
|
%s = add i16 %a, 1234
|
|
%k = icmp ugt i16 %x, %y
|
|
%z = zext i1 %k to i16
|
|
%r = add i16 %s, %z
|
|
store i16 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc32mi_legacy(ptr %ptr, i32 %x, i32 %y) nounwind {
|
|
; CHECK-LABEL: adc32mi_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
|
|
; CHECK-NEXT: adcl $123456, (%rdi) # encoding: [0x81,0x17,0x40,0xe2,0x01,0x00]
|
|
; CHECK-NEXT: # imm = 0x1E240
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%a = load i32, ptr %ptr
|
|
%s = add i32 %a, 123456
|
|
%k = icmp ugt i32 %x, %y
|
|
%z = zext i1 %k to i32
|
|
%r = add i32 %s, %z
|
|
store i32 %r, ptr %ptr
|
|
ret void
|
|
}
|
|
|
|
define void @adc64mi_legacy(ptr %ptr, i64 %x, i64 %y) nounwind {
|
|
; CHECK-LABEL: adc64mi_legacy:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
|
|
; CHECK-NEXT: adcq $123456, (%rdi) # encoding: [0x48,0x81,0x17,0x40,0xe2,0x01,0x00]
|
|
; CHECK-NEXT: # imm = 0x1E240
|
|
; CHECK-NEXT: retq # encoding: [0xc3]
|
|
%a = load i64, ptr %ptr
|
|
%s = add i64 %a, 123456
|
|
%k = icmp ugt i64 %x, %y
|
|
%z = zext i1 %k to i64
|
|
%r = add i64 %s, %z
|
|
store i64 %r, ptr %ptr
|
|
ret void
|
|
}
|