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128 lines
4.3 KiB
LLVM
128 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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define <4 x float> @select_mask_add_ss(<4 x float> %w, i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_mask_add_ss:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vaddss %xmm2, %xmm1, %xmm0 {%k1}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fadd float %1, %0
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%3 = and i8 %u, 1
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%4 = icmp eq i8 %3, 0
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%5 = extractelement <4 x float> %w, i32 0
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%6 = select i1 %4, float %5, float %2
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%7 = insertelement <4 x float> %a, float %6, i32 0
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ret <4 x float> %7
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}
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define <4 x float> @select_maskz_add_ss(i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_maskz_add_ss:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vaddss %xmm1, %xmm0, %xmm0 {%k1} {z}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fadd float %1, %0
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%3 = and i8 %u, 1
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%4 = icmp eq i8 %3, 0
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%5 = select i1 %4, float 0.000000e+00, float %2
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%6 = insertelement <4 x float> %a, float %5, i32 0
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ret <4 x float> %6
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}
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define <4 x float> @select_mask_sub_ss(<4 x float> %w, i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_mask_sub_ss:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vsubss %xmm2, %xmm1, %xmm0 {%k1}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fsub float %1, %0
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%3 = and i8 %u, 1
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%4 = icmp eq i8 %3, 0
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%5 = extractelement <4 x float> %w, i32 0
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%6 = select i1 %4, float %5, float %2
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%7 = insertelement <4 x float> %a, float %6, i32 0
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ret <4 x float> %7
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}
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define <4 x float> @select_maskz_sub_ss(i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_maskz_sub_ss:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vsubss %xmm1, %xmm0, %xmm0 {%k1} {z}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fsub float %1, %0
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%3 = and i8 %u, 1
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%4 = icmp eq i8 %3, 0
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%5 = select i1 %4, float 0.000000e+00, float %2
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%6 = insertelement <4 x float> %a, float %5, i32 0
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ret <4 x float> %6
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}
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define <4 x float> @select_mask_mul_ss(<4 x float> %w, i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_mask_mul_ss:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vmulss %xmm2, %xmm1, %xmm0 {%k1}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fmul float %1, %0
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%3 = and i8 %u, 1
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%4 = icmp eq i8 %3, 0
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%5 = extractelement <4 x float> %w, i32 0
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%6 = select i1 %4, float %5, float %2
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%7 = insertelement <4 x float> %a, float %6, i32 0
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ret <4 x float> %7
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}
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define <4 x float> @select_maskz_mul_ss(i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_maskz_mul_ss:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 {%k1} {z}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fmul float %1, %0
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%3 = and i8 %u, 1
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%4 = icmp eq i8 %3, 0
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%5 = select i1 %4, float 0.000000e+00, float %2
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%6 = insertelement <4 x float> %a, float %5, i32 0
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ret <4 x float> %6
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}
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; Make sure we don't crash trying to truncate the and instruction i4->i8. We need to extend instead.
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define <4 x float> @select_mask_add_ss_small_mask_type(<4 x float> %w, i4 %u, <4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: select_mask_add_ss_small_mask_type:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vaddss %xmm2, %xmm1, %xmm0 {%k1}
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %b, i32 0
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%1 = extractelement <4 x float> %a, i32 0
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%2 = fadd float %1, %0
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%3 = and i4 %u, 1
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%4 = icmp eq i4 %3, 0
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%5 = extractelement <4 x float> %w, i32 0
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%6 = select i1 %4, float %5, float %2
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%7 = insertelement <4 x float> %a, float %6, i32 0
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ret <4 x float> %7
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}
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