TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/dag-stlf-mismatch.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512

%struct.Data = type { float }

define float @test_stlf_integer(ptr %p, float %v) {
; X64-LABEL: test_stlf_integer:
; X64:       # %bb.0:
; X64-NEXT:    movl $0, (%rdi)
; X64-NEXT:    xorps %xmm1, %xmm1
; X64-NEXT:    mulss %xmm1, %xmm0
; X64-NEXT:    retq
;
; AVX512-LABEL: test_stlf_integer:
; AVX512:       # %bb.0:
; AVX512-NEXT:    movl $0, (%rcx)
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmulss %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    retq
  store i32 0, ptr %p, align 4
  %f = load float, ptr %p, align 4
  %r = fmul float %f, %v
  ret float %r
}

define float @test_stlf_vector(ptr %p, float %v) {
; X64-LABEL: test_stlf_vector:
; X64:       # %bb.0:
; X64-NEXT:    xorps %xmm1, %xmm1
; X64-NEXT:    movups %xmm1, (%rdi)
; X64-NEXT:    mulss (%rdi), %xmm0
; X64-NEXT:    retq
;
; AVX512-LABEL: test_stlf_vector:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovups %xmm0, (%rcx)
; AVX512-NEXT:    vmulss (%rcx), %xmm1, %xmm0
; AVX512-NEXT:    retq
  store <4 x float> zeroinitializer, ptr %p, align 4
  %f = load float, ptr %p, align 4
  %r = fmul float %f, %v
  ret float %r
}

define float @test_stlf_bitcast(ptr %p, float %v) {
; X64-LABEL: test_stlf_bitcast:
; X64:       # %bb.0:
; X64-NEXT:    xorps %xmm1, %xmm1
; X64-NEXT:    movups %xmm1, (%rdi)
; X64-NEXT:    mulss (%rdi), %xmm0
; X64-NEXT:    retq
;
; AVX512-LABEL: test_stlf_bitcast:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovups %xmm0, (%rcx)
; AVX512-NEXT:    vmulss (%rcx), %xmm1, %xmm0
; AVX512-NEXT:    retq
  store <2 x i64> zeroinitializer, ptr %p, align 4
  %f = load float, ptr %p, align 4
  %r = fmul float %f, %v
  ret float %r
}

declare void @ext_func(ptr byval(%struct.Data) align 4 %p)
define void @test_stlf_late_byval(ptr %ptr) nounwind {
; X64-LABEL: test_stlf_late_byval:
; X64:       # %bb.0:
; X64-NEXT:    pushq %rax
; X64-NEXT:    movl $0, (%rdi)
; X64-NEXT:    movl $0, (%rsp)
; X64-NEXT:    callq ext_func@PLT
; X64-NEXT:    popq %rax
; X64-NEXT:    retq
;
; AVX512-LABEL: test_stlf_late_byval:
; AVX512:       # %bb.0:
; AVX512-NEXT:    subq $40, %rsp
; AVX512-NEXT:    movl $0, (%rcx)
; AVX512-NEXT:    movl $0, {{[0-9]+}}(%rsp)
; AVX512-NEXT:    leaq {{[0-9]+}}(%rsp), %rcx
; AVX512-NEXT:    callq ext_func
; AVX512-NEXT:    addq $40, %rsp
; AVX512-NEXT:    retq
  store i32 0, ptr %ptr, align 4
  call void @ext_func(ptr byval(%struct.Data) align 4 %ptr)
  ret void
}

define float @test_stlf_variable(ptr %p, i32 %val, float %v) {
; X64-LABEL: test_stlf_variable:
; X64:       # %bb.0:
; X64-NEXT:    movd %esi, %xmm1
; X64-NEXT:    movl %esi, (%rdi)
; X64-NEXT:    mulss %xmm1, %xmm0
; X64-NEXT:    retq
;
; AVX512-LABEL: test_stlf_variable:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vmovd %edx, %xmm0
; AVX512-NEXT:    movl %edx, (%rcx)
; AVX512-NEXT:    vmulss %xmm2, %xmm0, %xmm0
; AVX512-NEXT:    retq
  store i32 %val, ptr %p, align 4
  %f = load float, ptr %p, align 4
  %r = fmul float %f, %v
  ret float %r
}

define <32 x i1> @v32i1_bitcast_crash(<4 x i8> %arg) nounwind {
; X64-LABEL: v32i1_bitcast_crash:
; X64:       # %bb.0:
; X64-NEXT:    movq %rdi, %rax
; X64-NEXT:    movss %xmm0, (%rdi)
; X64-NEXT:    retq
;
; AVX512-LABEL: v32i1_bitcast_crash:
; AVX512:       # %bb.0:
; AVX512-NEXT:    subq $24, %rsp
; AVX512-NEXT:    vmovaps (%rcx), %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp)
; AVX512-NEXT:    kmovd (%rsp), %k0
; AVX512-NEXT:    vpmovm2b %k0, %ymm0
; AVX512-NEXT:    addq $24, %rsp
; AVX512-NEXT:    retq
  %res = bitcast <4 x i8> %arg to <32 x i1>
  ret <32 x i1> %res
}