derek.holloway
7502bf64a4
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39 lines
1.9 KiB
LLVM
39 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
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define void @PR117684(i1 %cond, <8 x float> %vec, ptr %ptr1, ptr %ptr2) #0 {
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; CHECK-LABEL: PR117684:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vcmpnltss %xmm1, %xmm0, %k1
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; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [NaN,NaN,NaN,NaN]
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; CHECK-NEXT: vinsertf32x4 $0, %xmm0, %ymm0, %ymm0 {%k1} {z}
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; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
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; CHECK-NEXT: vbroadcastss %xmm2, %ymm2
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: cmoveq %rdx, %rsi
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; CHECK-NEXT: vmovups %ymm2, (%rsi)
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; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vbroadcastss %xmm0, %ymm0
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; CHECK-NEXT: vmovups %ymm0, (%rdx)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%cmp = fcmp olt <8 x float> %vec, zeroinitializer
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%sel1 = select <8 x i1> %cmp, <8 x float> zeroinitializer, <8 x float>
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<float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000,
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float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000>
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%fmul1 = fmul <8 x float> zeroinitializer, %sel1
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%shuffle = shufflevector <8 x float> %fmul1, <8 x float> zeroinitializer, <8 x i32> zeroinitializer
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%fmul2 = fmul <8 x float> %shuffle,
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<float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000,
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float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000>
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%sel2 = select i1 %cond, ptr %ptr1, ptr %ptr2
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store <8 x float> %fmul2, ptr %sel2, align 4
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%fmul3 = fmul <8 x float> %shuffle, zeroinitializer
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store <8 x float> %fmul3, ptr %ptr2, align 4
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ret void
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}
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attributes #0 = { "target-cpu"="skylake-avx512" }
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