derek.holloway
7502bf64a4
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94 lines
3.0 KiB
LLVM
94 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
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%0 = type { i64, i64 }
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%1 = type { i128, i1 }
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; This used to call muloti4, but that won't link with libgcc.
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define %0 @x(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nounwind uwtable ssp {
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; CHECK-LABEL: x:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: .cfi_offset %rbx, -24
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; CHECK-NEXT: .cfi_offset %r14, -16
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; CHECK-NEXT: movq %rdx, %r9
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; CHECK-NEXT: movq %rsi, %r8
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; CHECK-NEXT: movq %rsi, %rbx
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; CHECK-NEXT: sarq $63, %rbx
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; CHECK-NEXT: imulq %rdx, %rbx
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: mulq %rdx
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; CHECK-NEXT: movq %rdx, %r10
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; CHECK-NEXT: movq %rax, %rsi
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; CHECK-NEXT: movq %r8, %rax
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; CHECK-NEXT: mulq %r9
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; CHECK-NEXT: movq %rdx, %r9
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; CHECK-NEXT: movq %rax, %r11
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; CHECK-NEXT: addq %r10, %r11
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; CHECK-NEXT: adcq %rbx, %r9
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; CHECK-NEXT: movq %r9, %rbx
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; CHECK-NEXT: sarq $63, %rbx
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; CHECK-NEXT: movq %rcx, %r14
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; CHECK-NEXT: sarq $63, %r14
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; CHECK-NEXT: imulq %rdi, %r14
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: mulq %rcx
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; CHECK-NEXT: movq %rdx, %r10
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; CHECK-NEXT: movq %rax, %rdi
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; CHECK-NEXT: addq %r11, %rdi
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; CHECK-NEXT: adcq %r14, %r10
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; CHECK-NEXT: movq %r10, %r11
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; CHECK-NEXT: sarq $63, %r11
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; CHECK-NEXT: addq %r9, %r10
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; CHECK-NEXT: adcq %rbx, %r11
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; CHECK-NEXT: movq %r8, %rax
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; CHECK-NEXT: imulq %rcx
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; CHECK-NEXT: addq %r10, %rax
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; CHECK-NEXT: adcq %r11, %rdx
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; CHECK-NEXT: movq %rdi, %rcx
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; CHECK-NEXT: sarq $63, %rcx
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; CHECK-NEXT: xorq %rcx, %rdx
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; CHECK-NEXT: xorq %rax, %rcx
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; CHECK-NEXT: orq %rdx, %rcx
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; CHECK-NEXT: jne LBB0_1
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; CHECK-NEXT: ## %bb.2: ## %nooverflow
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: movq %rdi, %rdx
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB0_1: ## %overflow
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; CHECK-NEXT: ud2
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entry:
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%tmp16 = zext i64 %a.coerce0 to i128
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%tmp11 = zext i64 %a.coerce1 to i128
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%tmp12 = shl nuw i128 %tmp11, 64
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%ins14 = or i128 %tmp12, %tmp16
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%tmp6 = zext i64 %b.coerce0 to i128
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%tmp3 = zext i64 %b.coerce1 to i128
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%tmp4 = shl nuw i128 %tmp3, 64
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%ins = or i128 %tmp4, %tmp6
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%0 = tail call %1 @llvm.smul.with.overflow.i128(i128 %ins14, i128 %ins)
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%1 = extractvalue %1 %0, 0
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%2 = extractvalue %1 %0, 1
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br i1 %2, label %overflow, label %nooverflow
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overflow: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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nooverflow: ; preds = %entry
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%tmp20 = trunc i128 %1 to i64
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%tmp21 = insertvalue %0 undef, i64 %tmp20, 0
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%tmp22 = lshr i128 %1, 64
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%tmp23 = trunc i128 %tmp22 to i64
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%tmp24 = insertvalue %0 %tmp21, i64 %tmp23, 1
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ret %0 %tmp24
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}
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declare %1 @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone
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declare void @llvm.trap() nounwind
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