derek.holloway
7502bf64a4
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53 lines
1.9 KiB
LLVM
53 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=POSTRA
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=NOPOSTRA
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=NOPOSTRA
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; Ensure reloads are after narrowed i512 -> i32 store
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define i1 @PR166744(ptr %v, i64 %idx, i1 zeroext %b) {
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; POSTRA-LABEL: PR166744:
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; POSTRA: # %bb.0:
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; POSTRA-NEXT: movl $1029, %eax # imm = 0x405
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; POSTRA-NEXT: shlxl %esi, %edx, %edx
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; POSTRA-NEXT: bextrl %eax, %esi, %eax
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; POSTRA-NEXT: movl (%rdi,%rax,4), %ecx
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; POSTRA-NEXT: btrl %esi, %ecx
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; POSTRA-NEXT: orl %ecx, %edx
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; POSTRA-NEXT: movl %edx, (%rdi,%rax,4)
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; POSTRA-NEXT: vmovdqu (%rdi), %ymm0
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; POSTRA-NEXT: vpor 32(%rdi), %ymm0, %ymm0
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; POSTRA-NEXT: vptest %ymm0, %ymm0
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; POSTRA-NEXT: setne %al
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; POSTRA-NEXT: vzeroupper
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; POSTRA-NEXT: retq
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;
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; NOPOSTRA-LABEL: PR166744:
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; NOPOSTRA: # %bb.0:
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; NOPOSTRA-NEXT: movl %esi, %eax
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; NOPOSTRA-NEXT: shrl $3, %esi
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; NOPOSTRA-NEXT: andl $60, %esi
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; NOPOSTRA-NEXT: movl (%rdi,%rsi), %ecx
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; NOPOSTRA-NEXT: btrl %eax, %ecx
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; NOPOSTRA-NEXT: shlxl %eax, %edx, %eax
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; NOPOSTRA-NEXT: orl %ecx, %eax
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; NOPOSTRA-NEXT: movl %eax, (%rdi,%rsi)
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; NOPOSTRA-NEXT: vmovdqu (%rdi), %ymm0
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; NOPOSTRA-NEXT: vpor 32(%rdi), %ymm0, %ymm0
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; NOPOSTRA-NEXT: vptest %ymm0, %ymm0
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; NOPOSTRA-NEXT: setne %al
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; NOPOSTRA-NEXT: vzeroupper
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; NOPOSTRA-NEXT: retq
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%rem = and i64 %idx, 511
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%sh_prom = zext nneg i64 %rem to i512
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%shl = shl nuw i512 1, %sh_prom
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%not = xor i512 %shl, -1
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%load = load i512, ptr %v, align 8
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%and = and i512 %load, %not
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%conv2 = zext i1 %b to i512
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%shl4 = shl nuw i512 %conv2, %sh_prom
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%or = or i512 %and, %shl4
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store i512 %or, ptr %v, align 8
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%cmp = icmp ne i512 %or, 0
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ret i1 %cmp
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}
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