derek.holloway
7502bf64a4
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43 lines
1.5 KiB
LLVM
43 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
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define i128 @hot_end_mask(ptr %token, i32 %end) {
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; CHECK-LABEL: hot_end_mask:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: shlq $32, %rsi
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; CHECK-NEXT: orq %rsi, %rax
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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%load = load i128, ptr %token, align 16
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%mask = and i128 %load, -18446744069414584321
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%zext = zext i32 %end to i128
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%shl = shl nuw nsw i128 %zext, 32
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%blend = or disjoint i128 %mask, %shl
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store i128 %blend, ptr %token, align 16
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ret i128 %blend
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}
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define i128 @hot_start_mask(ptr %token, i32 %start) {
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; CHECK-LABEL: hot_start_mask:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: movl 4(%rdi), %ecx
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; CHECK-NEXT: shlq $32, %rcx
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: orq %rcx, %rax
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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%load = load i128, ptr %token, align 16
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%mask = and i128 %load, -4294967296
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%zext = zext i32 %start to i128
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%blend = or disjoint i128 %mask, %zext
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store i128 %blend, ptr %token, align 16
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ret i128 %blend
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}
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