derek.holloway
7502bf64a4
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32 lines
1.0 KiB
LLVM
32 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 < %s | FileCheck %s
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; https://llvm.org/bugs/show_bug.cgi?id=28444
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; extract_vector_elt is allowed to have a different result type than
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; the vector scalar type.
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; This uses both
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; i8 = extract_vector_elt v1i1, Constant:i64<0>
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; i1 = extract_vector_elt v1i1, Constant:i64<0>
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define void @extractelt_mismatch_vector_element_type(i32 %arg, i1 %x) {
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; CHECK-LABEL: extractelt_mismatch_vector_element_type:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: movb %al, (%rax)
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; CHECK-NEXT: movb %al, (%rax)
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; CHECK-NEXT: retq
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bb:
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%tmp = icmp ult i32 %arg, 0
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%tmp2 = insertelement <1 x i1> undef, i1 true, i32 0
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%f = insertelement <1 x i1> undef, i1 %x, i32 0
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%tmp3 = select i1 %tmp, <1 x i1> %f, <1 x i1> %tmp2
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%tmp6 = extractelement <1 x i1> %tmp3, i32 0
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br label %bb1
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bb1:
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store volatile <1 x i1> %tmp3, ptr undef
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store volatile i1 %tmp6, ptr undef
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ret void
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}
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