derek.holloway
7502bf64a4
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73 lines
2.6 KiB
LLVM
73 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefix=AVX512
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512fp16 | FileCheck %s --check-prefix=AVX512FP16
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; This test makes sure that a vector that needs to be promoted that is bitcasted to fp16 is legalized correctly without causing a width mismatch.
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define void @constant_fold_vector_to_half() {
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; SSE2-LABEL: constant_fold_vector_to_half:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pextrw $0, %xmm0, %eax
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; SSE2-NEXT: movw %ax, (%rax)
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; SSE2-NEXT: retq
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;
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; AVX512-LABEL: constant_fold_vector_to_half:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpextrw $0, %xmm0, (%rax)
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; AVX512-NEXT: retq
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;
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; AVX512FP16-LABEL: constant_fold_vector_to_half:
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; AVX512FP16: # %bb.0:
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; AVX512FP16-NEXT: vmovsh {{.*#+}} xmm0 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
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; AVX512FP16-NEXT: vmovsh %xmm0, (%rax)
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; AVX512FP16-NEXT: retq
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store volatile half bitcast (<4 x i4> <i4 0, i4 0, i4 0, i4 4> to half), ptr undef
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ret void
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}
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; Similarly this makes sure that the opposite bitcast of the above is also legalized without crashing.
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define void @pr38533_2(half %x) {
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; SSE2-LABEL: pr38533_2:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pextrw $0, %xmm0, %eax
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; SSE2-NEXT: movw %ax, (%rax)
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; SSE2-NEXT: retq
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;
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; AVX512-LABEL: pr38533_2:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpextrw $0, %xmm0, (%rax)
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; AVX512-NEXT: retq
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;
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; AVX512FP16-LABEL: pr38533_2:
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; AVX512FP16: # %bb.0:
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; AVX512FP16-NEXT: vmovsh %xmm0, (%rax)
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; AVX512FP16-NEXT: retq
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%a = bitcast half %x to <4 x i4>
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store volatile <4 x i4> %a, ptr undef
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ret void
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}
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; This case is a bitcast from fp16 to a 16-bit wide legal vector type. In this case the result type is legal when the bitcast gets type legalized.
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define void @pr38533_3(half %x) {
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; SSE2-LABEL: pr38533_3:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pextrw $0, %xmm0, %eax
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; SSE2-NEXT: movw %ax, (%rax)
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; SSE2-NEXT: retq
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;
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; AVX512-LABEL: pr38533_3:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpextrw $0, %xmm0, (%rax)
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; AVX512-NEXT: retq
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;
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; AVX512FP16-LABEL: pr38533_3:
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; AVX512FP16: # %bb.0:
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; AVX512FP16-NEXT: vmovsh %xmm0, (%rax)
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; AVX512FP16-NEXT: retq
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%a = bitcast half %x to <16 x i1>
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store volatile <16 x i1> %a, ptr undef
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ret void
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}
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