derek.holloway
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87 lines
2.9 KiB
LLVM
87 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-- -O0 < %s | FileCheck %s
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; RUN: llc -mtriple=x86_64-- -O0 -mattr=+zu < %s | FileCheck %s -check-prefix=SETZUCC
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; RUN: llc -mtriple=x86_64-- -O0 -mattr=+zu,+prefer-legacy-setcc < %s | FileCheck %s -check-prefix=NO-SETZUCC
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define i64 @adder(i64 %lhs, i64 %rhs) {
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; CHECK-LABEL: adder:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq %rsi, %rdi
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; CHECK-NEXT: seto %dl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: # kill: def $rax killed $eax
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; CHECK-NEXT: movl $148, %ecx
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; CHECK-NEXT: testb $1, %dl
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; CHECK-NEXT: cmovneq %rcx, %rax
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; CHECK-NEXT: retq
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;
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; SETZUCC-LABEL: adder:
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; SETZUCC: # %bb.0:
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; SETZUCC-NEXT: addq %rsi, %rdi
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; SETZUCC-NEXT: setzuo %dl
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; SETZUCC-NEXT: xorl %eax, %eax
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; SETZUCC-NEXT: # kill: def $rax killed $eax
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; SETZUCC-NEXT: movl $148, %ecx
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; SETZUCC-NEXT: testb $1, %dl
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; SETZUCC-NEXT: cmovneq %rcx, %rax
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; SETZUCC-NEXT: retq
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;
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; NO-SETZUCC-LABEL: adder:
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; NO-SETZUCC: # %bb.0:
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; NO-SETZUCC-NEXT: addq %rsi, %rdi
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; NO-SETZUCC-NEXT: seto %dl
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; NO-SETZUCC-NEXT: xorl %eax, %eax
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; NO-SETZUCC-NEXT: # kill: def $rax killed $eax
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; NO-SETZUCC-NEXT: movl $148, %ecx
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; NO-SETZUCC-NEXT: testb $1, %dl
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; NO-SETZUCC-NEXT: cmovneq %rcx, %rax
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; NO-SETZUCC-NEXT: retq
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%res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %lhs, i64 %rhs)
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%errorbit = extractvalue { i64, i1 } %res, 1
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%errorval = select i1 %errorbit, i64 148, i64 0
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ret i64 %errorval
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}
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@a = global i32 0, align 4
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define i64 @adder_constexpr(i64 %lhs, i64 %rhs) {
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; CHECK-LABEL: adder_constexpr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq %rsi, %rdi
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; CHECK-NEXT: seto %dl
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; CHECK-NEXT: movq a@GOTPCREL(%rip), %rax
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; CHECK-NEXT: addq $5, %rax
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; CHECK-NEXT: movl $148, %ecx
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; CHECK-NEXT: testb $1, %dl
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; CHECK-NEXT: cmovneq %rcx, %rax
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; CHECK-NEXT: retq
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;
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; SETZUCC-LABEL: adder_constexpr:
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; SETZUCC: # %bb.0:
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; SETZUCC-NEXT: addq %rsi, %rdi
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; SETZUCC-NEXT: setzuo %dl
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; SETZUCC-NEXT: movq a@GOTPCREL(%rip), %rax
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; SETZUCC-NEXT: addq $5, %rax
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; SETZUCC-NEXT: movl $148, %ecx
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; SETZUCC-NEXT: testb $1, %dl
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; SETZUCC-NEXT: cmovneq %rcx, %rax
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; SETZUCC-NEXT: retq
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;
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; NO-SETZUCC-LABEL: adder_constexpr:
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; NO-SETZUCC: # %bb.0:
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; NO-SETZUCC-NEXT: addq %rsi, %rdi
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; NO-SETZUCC-NEXT: seto %dl
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; NO-SETZUCC-NEXT: movq a@GOTPCREL(%rip), %rax
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; NO-SETZUCC-NEXT: addq $5, %rax
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; NO-SETZUCC-NEXT: movl $148, %ecx
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; NO-SETZUCC-NEXT: testb $1, %dl
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; NO-SETZUCC-NEXT: cmovneq %rcx, %rax
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; NO-SETZUCC-NEXT: retq
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%res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %lhs, i64 %rhs)
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%errorbit = extractvalue { i64, i1 } %res, 1
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%errorval = select i1 %errorbit, i64 148, i64 add (i64 ptrtoint (ptr @a to i64), i64 5)
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ret i64 %errorval
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}
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declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)
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