derek.holloway
7502bf64a4
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195 lines
7.0 KiB
LLVM
195 lines
7.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 < %s | FileCheck %s
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; This test checks various function call behaviors between preserve_none and
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; normal calling conventions.
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declare preserve_nonecc void @callee(ptr)
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; Normal caller calls preserve_none callee. Will not generated tail call because
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; of incompatible calling convention. Callee saved registers are saved/restored
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; around the call.
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define void @caller1(ptr %a) {
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; CHECK-LABEL: caller1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %r15
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: pushq %r13
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: pushq %r12
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; CHECK-NEXT: .cfi_def_cfa_offset 40
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 48
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; CHECK-NEXT: .cfi_offset %rbx, -48
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; CHECK-NEXT: .cfi_offset %r12, -40
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; CHECK-NEXT: .cfi_offset %r13, -32
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; CHECK-NEXT: .cfi_offset %r14, -24
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; CHECK-NEXT: .cfi_offset %r15, -16
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; CHECK-NEXT: movq %rdi, %r12
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; CHECK-NEXT: callq callee@PLT
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 40
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; CHECK-NEXT: popq %r12
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: popq %r13
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: popq %r15
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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tail call preserve_nonecc void @callee(ptr %a)
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ret void
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}
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; Preserve_none caller calls preserve_none callee. Same function body.
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; The tail call is preserved. No registers are saved/restored around the call.
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; Actually a simple jmp instruction is generated.
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define preserve_nonecc void @caller2(ptr %a) {
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; CHECK-LABEL: caller2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: jmp callee@PLT # TAILCALL
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tail call preserve_nonecc void @callee(ptr %a)
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ret void
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}
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%S = type { [3 x i64] }
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declare preserve_nonecc void @callee_byval(ptr byval(%S) align 8)
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; Preserve_none caller with a byval argument from a local alloca should not
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; be lowered as a sibling tail call, as this would corrupt the stack frame
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; containing the byval copy.
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define preserve_nonecc void @caller_byval_alloca() {
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; CHECK-LABEL: caller_byval_alloca:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $56, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 64
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: movups %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq $0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movups %xmm0, (%rsp)
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; CHECK-NEXT: movq $0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: callq callee_byval@PLT
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; CHECK-NEXT: addq $56, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%s = alloca %S, align 8
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%a0 = getelementptr inbounds %S, ptr %s, i32 0, i32 0, i32 0
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store i64 0, ptr %a0, align 8
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%a1 = getelementptr inbounds %S, ptr %s, i32 0, i32 0, i32 1
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store i64 0, ptr %a1, align 8
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%a2 = getelementptr inbounds %S, ptr %s, i32 0, i32 0, i32 2
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store i64 0, ptr %a2, align 8
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tail call preserve_nonecc void @callee_byval(ptr byval(%S) align 8 %s)
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ret void
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}
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; Test that byval arguments from an incoming pointer are correctly copied.
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define preserve_nonecc void @caller_byval_ptr(ptr %a) {
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; CHECK-LABEL: caller_byval_ptr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $24, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: movq 16(%r12), %rax
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; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movups (%r12), %xmm0
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; CHECK-NEXT: movups %xmm0, (%rsp)
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; CHECK-NEXT: callq callee_byval@PLT
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; CHECK-NEXT: addq $24, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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call preserve_nonecc void @callee_byval(ptr byval(%S) align 8 %a)
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ret void
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}
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; Preserve_none function can use more registers to pass parameters.
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declare preserve_nonecc i64 @callee_with_many_param2(i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, i64 %a9, i64 %a10, i64 %a11)
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define preserve_nonecc i64 @callee_with_many_param(i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, i64 %a9, i64 %a10, i64 %a11, i64 %a12) {
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; CHECK-LABEL: callee_with_many_param:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movq %r13, %r12
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; CHECK-NEXT: movq %r14, %r13
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; CHECK-NEXT: movq %r15, %r14
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; CHECK-NEXT: movq %rdi, %r15
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; CHECK-NEXT: movq %rsi, %rdi
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; CHECK-NEXT: movq %rdx, %rsi
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; CHECK-NEXT: movq %rcx, %rdx
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: movq %r9, %r8
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; CHECK-NEXT: movq %r11, %r9
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; CHECK-NEXT: movq %rax, %r11
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; CHECK-NEXT: callq callee_with_many_param2@PLT
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%ret = call preserve_nonecc i64 @callee_with_many_param2(i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, i64 %a9, i64 %a10, i64 %a11, i64 %a12)
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ret i64 %ret
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}
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define i64 @caller3() {
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; CHECK-LABEL: caller3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %r15
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: pushq %r13
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: pushq %r12
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; CHECK-NEXT: .cfi_def_cfa_offset 40
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 48
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; CHECK-NEXT: .cfi_offset %rbx, -48
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; CHECK-NEXT: .cfi_offset %r12, -40
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; CHECK-NEXT: .cfi_offset %r13, -32
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; CHECK-NEXT: .cfi_offset %r14, -24
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; CHECK-NEXT: .cfi_offset %r15, -16
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; CHECK-NEXT: movl $1, %r12d
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; CHECK-NEXT: movl $2, %r13d
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; CHECK-NEXT: movl $3, %r14d
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; CHECK-NEXT: movl $4, %r15d
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; CHECK-NEXT: movl $5, %edi
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; CHECK-NEXT: movl $6, %esi
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; CHECK-NEXT: movl $7, %edx
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; CHECK-NEXT: movl $8, %ecx
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; CHECK-NEXT: movl $9, %r8d
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; CHECK-NEXT: movl $10, %r9d
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; CHECK-NEXT: movl $11, %r11d
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; CHECK-NEXT: movl $12, %eax
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; CHECK-NEXT: callq callee_with_many_param@PLT
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 40
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; CHECK-NEXT: popq %r12
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: popq %r13
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: popq %r15
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%ret = call preserve_nonecc i64 @callee_with_many_param(i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12)
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ret i64 %ret
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}
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; Non-volatile registers are used to pass the first few parameters.
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declare void @boring()
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declare preserve_nonecc void @continuation(ptr, ptr, ptr, ptr)
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define preserve_nonecc void @entry(ptr %r12, ptr %r13, ptr %r14, ptr %r15) {
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; CHECK-LABEL: entry:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq boring@PLT
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: jmp continuation@PLT # TAILCALL
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call void @boring()
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musttail call preserve_nonecc void @continuation(ptr %r12, ptr %r13, ptr %r14, ptr %r15)
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ret void
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}
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