derek.holloway
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190 lines
6.4 KiB
YAML
190 lines
6.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
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# RUN: llc -mtriple=x86_64-- -run-pass=register-coalescer -o - %s | FileCheck %s
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# Test the implicit operands and operand flags on remateralized
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# instructions folding into a sub or super register def.
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# Test a full register def at %t1 rematerializing into a subregister
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# use. The subregister dest operand should be dead, with an
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# implicit-def of the full physical register.
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---
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name: rematerialize_super_register_into_subreg_def
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: rematerialize_super_register_into_subreg_def
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %t3:gr64 = MOV64ri32 -11
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; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
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; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
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; CHECK-NEXT: JMP_1 %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: dead $rax = MOV64ri32 -11, implicit-def $eax
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; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
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; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags
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; CHECK-NEXT: RET 0, $eax
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: $rax = COPY %t3
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; CHECK-NEXT: RET 0, $rax
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bb.0:
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%t1:gr64 = MOV64ri32 -11
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CMP64ri8 %t1, 1, implicit-def $eflags
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JCC_1 %bb.2, 4, implicit killed $eflags
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JMP_1 %bb.1
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bb.1:
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%t2:gr64 = COPY %t1
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$eax = COPY %t2.sub_32bit
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CMP64ri8 %t2, 1, implicit-def $eflags
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JCC_1 %bb.1, 4, implicit killed $eflags
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RET 0, $eax
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bb.2:
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%t3:gr64 = COPY %t1
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%t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags
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bb.3:
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$rax = COPY %t3
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RET 0, $rax
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...
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# Test an undef subregister def of %t1 rematerializing into a physical
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# super register def
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---
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name: rematerialize_subregister_into_superreg_def
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: rematerialize_subregister_into_superreg_def
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: undef %t3.sub_32bit:gr64_with_sub_8bit = MOV32ri -11
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; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
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; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
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; CHECK-NEXT: JMP_1 %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: dead $eax = MOV32ri -11, implicit-def $rax
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; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
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; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags
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; CHECK-NEXT: RET 0, $rax
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %t3:gr64_with_sub_8bit = ADD64ri8 %t3, 10, implicit-def $eflags
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: $rax = COPY %t3
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; CHECK-NEXT: RET 0, $rax
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bb.0:
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undef %t1.sub_32bit:gr64_with_sub_8bit = MOV32ri -11
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CMP64ri8 %t1, 1, implicit-def $eflags
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JCC_1 %bb.2, 4, implicit killed $eflags
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JMP_1 %bb.1
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bb.1:
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%t2:gr64 = COPY %t1
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$rax = COPY %t2
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CMP64ri8 %t2, 1, implicit-def $eflags
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JCC_1 %bb.1, 4, implicit killed $eflags
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RET 0, $rax
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bb.2:
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%t3:gr64 = COPY %t1
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%t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags
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bb.3:
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$rax = COPY %t3
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RET 0, $rax
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...
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# Handle that rematerializing an instruction with an implicit def of a
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# virtual super register into a physical register works.
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---
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name: rematerialize_subregister_into_superreg_def_with_impdef_physreg
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: rematerialize_subregister_into_superreg_def_with_impdef_physreg
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: undef %t3.sub_32bit:gr64_with_sub_8bit = MOV32ri -11, implicit-def %t3
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; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
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; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
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; CHECK-NEXT: JMP_1 %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: dead $eax = MOV32ri -11, implicit-def $rax
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; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
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; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags
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; CHECK-NEXT: RET 0, $rax
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %t3:gr64_with_sub_8bit = ADD64ri8 %t3, 10, implicit-def $eflags
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: $rax = COPY %t3
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; CHECK-NEXT: RET 0, $rax
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bb.0:
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undef %t1.sub_32bit:gr64_with_sub_8bit = MOV32ri -11, implicit-def %t1
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CMP64ri8 %t1, 1, implicit-def $eflags
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JCC_1 %bb.2, 4, implicit killed $eflags
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JMP_1 %bb.1
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bb.1:
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%t2:gr64 = COPY %t1
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$rax = COPY %t2
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CMP64ri8 %t2, 1, implicit-def $eflags
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JCC_1 %bb.1, 4, implicit killed $eflags
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RET 0, $rax
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bb.2:
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%t3:gr64 = COPY %t1
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%t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags
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bb.3:
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$rax = COPY %t3
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RET 0, $rax
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...
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---
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name: rematerialize_superregister_into_subregister_def_with_impdef_physreg
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: rematerialize_superregister_into_subregister_def_with_impdef_physreg
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; CHECK: dead $esi = MOV32r0 implicit-def dead $eflags, implicit-def $rsi
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; CHECK-NEXT: dead $edx = MOV32r0 implicit-def dead $eflags, implicit-def $rdx
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; CHECK-NEXT: FAKE_USE implicit killed $rsi, implicit killed $rdx
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; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def dead $rax, implicit-def $al
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; CHECK-NEXT: FAKE_USE implicit killed $al
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; CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags
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; CHECK-NEXT: RET 0, $eax
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undef %1.sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags, implicit-def %1
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$rsi = COPY %1
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$rdx = COPY %1
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FAKE_USE implicit killed $rsi, implicit killed $rdx
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%4:gr8 = COPY killed %1.sub_8bit
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$al = COPY killed %4
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FAKE_USE implicit killed $al
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$eax = MOV32r0 implicit-def dead $eflags
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RET 0, killed $eax
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