derek.holloway
7502bf64a4
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21 lines
627 B
LLVM
21 lines
627 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s
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; Check that widening doesn't introduce a mmx register in this case when
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; a simple load/store would suffice.
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define void @foo(ptr %A, ptr %B) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl (%ecx), %ecx
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; CHECK-NEXT: movl %ecx, (%eax)
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; CHECK-NEXT: retl
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entry:
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%tmp1 = load <2 x i16>, ptr %A ; <<2 x i16>> [#uses=1]
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store <2 x i16> %tmp1, ptr %B
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ret void
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}
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