derek.holloway
7502bf64a4
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345 lines
11 KiB
LLVM
345 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
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; Test simplifications of vector compares that should simplify to true, false or equality.
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define <4 x i32> @slt_min(<4 x i32> %x) {
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; CHECK-LABEL: slt_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp slt <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sge_min(<4 x i32> %x) {
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; CHECK-LABEL: sge_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sge <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sgt_min(<4 x i32> %x) {
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; CHECK-LABEL: sgt_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sgt <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sle_min(<4 x i32> %x) {
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; CHECK-LABEL: sle_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sle <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sgt_max(<4 x i32> %x) {
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; CHECK-LABEL: sgt_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sgt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sle_max(<4 x i32> %x) {
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; CHECK-LABEL: sle_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sle <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @slt_max(<4 x i32> %x) {
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; CHECK-LABEL: slt_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp slt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sge_max(<4 x i32> %x) {
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; CHECK-LABEL: sge_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sge <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ult_min(<4 x i32> %x) {
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; CHECK-LABEL: ult_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ult <4 x i32> %x, zeroinitializer
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @uge_min(<4 x i32> %x) {
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; CHECK-LABEL: uge_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp uge <4 x i32> %x, zeroinitializer
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ugt_min(<4 x i32> %x) {
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; CHECK-LABEL: ugt_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ugt <4 x i32> %x, zeroinitializer
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ule_min(<4 x i32> %x) {
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; CHECK-LABEL: ule_min:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ule <4 x i32> %x, zeroinitializer
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ugt_max(<4 x i32> %x) {
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; CHECK-LABEL: ugt_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ugt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ule_max(<4 x i32> %x) {
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; CHECK-LABEL: ule_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ule <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ult_max(<4 x i32> %x) {
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; CHECK-LABEL: ult_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ult <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @uge_max(<4 x i32> %x) {
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; CHECK-LABEL: uge_max:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm2, %xmm2
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; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
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; CHECK-NEXT: pxor %xmm2, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp uge <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @slt_min_plus1(<4 x i32> %x) {
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; CHECK-LABEL: slt_min_plus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp slt <4 x i32> %x, <i32 -2147483647, i32 -2147483647, i32 -2147483647, i32 -2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sge_min_plus1(<4 x i32> %x) {
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; CHECK-LABEL: sge_min_plus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sge <4 x i32> %x, <i32 -2147483647, i32 -2147483647, i32 -2147483647, i32 -2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sgt_max_minus1(<4 x i32> %x) {
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; CHECK-LABEL: sgt_max_minus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sgt <4 x i32> %x, <i32 2147483646, i32 2147483646, i32 2147483646, i32 2147483646>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @sle_max_minus1(<4 x i32> %x) {
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; CHECK-LABEL: sle_max_minus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp sle <4 x i32> %x, <i32 2147483646, i32 2147483646, i32 2147483646, i32 2147483646>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ult_one(<4 x i32> %x) {
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; CHECK-LABEL: ult_one:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ult <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @uge_one(<4 x i32> %x) {
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; CHECK-LABEL: uge_one:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483649,2147483649,2147483649]
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp uge <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ugt_max_minus1(<4 x i32> %x) {
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; CHECK-LABEL: ugt_max_minus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ugt <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ule_max_minus1(<4 x i32> %x) {
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; CHECK-LABEL: ule_max_minus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ule <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ugt_smax(<4 x i32> %x) {
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; CHECK-LABEL: ugt_smax:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ugt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ule_smax(<4 x i32> %x) {
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; CHECK-LABEL: ule_smax:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ule <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @ult_smin(<4 x i32> %x) {
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; CHECK-LABEL: ult_smin:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp ult <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @uge_smin(<4 x i32> %x) {
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; CHECK-LABEL: uge_smin:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%cmp = icmp uge <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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; Make sure we can efficiently handle ne smin by turning into sgt.
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define <4 x i32> @ne_smin(<4 x i32> %x) {
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; CHECK-LABEL: ne_smin:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: retq
|
|
%cmp = icmp ne <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
|
|
%r = sext <4 x i1> %cmp to <4 x i32>
|
|
ret <4 x i32> %r
|
|
}
|
|
|
|
; Make sure we can efficiently handle ne smax by turning into sgt. We can't fold
|
|
; the constant pool load, but the alternative is a cmpeq+invert which is 3 instructions.
|
|
; The PCMPGT version is two instructions given sufficient register allocation freedom
|
|
; to avoid the last mov to %xmm0 seen here.
|
|
define <4 x i32> @ne_smax(<4 x i32> %x) {
|
|
; CHECK-LABEL: ne_smax:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
|
|
; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
|
|
; CHECK-NEXT: movdqa %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%cmp = icmp ne <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
|
|
%r = sext <4 x i1> %cmp to <4 x i32>
|
|
ret <4 x i32> %r
|
|
}
|