derek.holloway
7502bf64a4
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47 lines
2.4 KiB
TableGen
47 lines
2.4 KiB
TableGen
// RUN: llvm-tblgen -I %p/../../../include -gen-global-isel-combiner \
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// RUN: -combiners=MyCombiner %s | \
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// RUN: FileCheck %s
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include "llvm/Target/Target.td"
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include "llvm/Target/GlobalISel/Combine.td"
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def MyTargetISA : InstrInfo;
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def MyTarget : Target { let InstructionSet = MyTargetISA; }
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def MIFlagsTest : GICombineRule<
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(defs root:$dst),
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(match (G_SEXT $dst, $tmp), (G_ZEXT $tmp, $src, (MIFlags FmReassoc, FmNsz, (not FmNoNans, FmArcp))):$mi),
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(apply (G_MUL $dst, $src, $src, (MIFlags $mi, FmReassoc, (not FmNsz, FmArcp))))>;
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def MyCombiner: GICombiner<"GenMyCombiner", [MIFlagsTest]>;
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// CHECK: const uint8_t *GenMyCombiner::getMatchTable() const {
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// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = {
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(63), // Rule ID 0 //
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// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_SEXT),
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// CHECK-NEXT: // MIs[0] dst
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// CHECK-NEXT: // No operand predicates
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// CHECK-NEXT: // MIs[0] tmp
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// CHECK-NEXT: GIM_RecordInsnIgnoreCopies, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
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// CHECK-NEXT: GIM_MIFlags, /*MI*/1, GIMT_Encode4(MachineInstr::FmNsz | MachineInstr::FmReassoc),
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// CHECK-NEXT: GIM_MIFlagsNot, /*MI*/1, GIMT_Encode4(MachineInstr::FmArcp | MachineInstr::FmNoNans),
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// CHECK-NEXT: // MIs[1] src
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// CHECK-NEXT: // No operand predicates
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// CHECK-NEXT: GIM_CheckIsSafeToFold, /*NumInsns*/1,
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// CHECK-NEXT: // Combiner Rule #0: MIFlagsTest
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// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_MUL),
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // dst
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
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// CHECK-NEXT: GIR_CopyMIFlags, /*InsnID*/0, /*OldInsnID*/1,
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// CHECK-NEXT: GIR_SetMIFlags, /*InsnID*/0, GIMT_Encode4(MachineInstr::FmReassoc),
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// CHECK-NEXT: GIR_UnsetMIFlags, /*InsnID*/0, GIMT_Encode4(MachineInstr::FmNsz | MachineInstr::FmArcp),
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// CHECK-NEXT: GIR_EraseRootFromParent_Done,
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// CHECK-NEXT: // Label 0: @63
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// CHECK-NEXT: GIM_Reject,
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// CHECK-NEXT: };
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// CHECK-NEXT: return MatchTable0;
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// CHECK-NEXT: }
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