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34 lines
1.9 KiB
TableGen
34 lines
1.9 KiB
TableGen
// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns -I %p/../../../include -I %p/../Common %s | FileCheck -check-prefix=GISEL %s
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def int_tgt_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
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// Test that using srcvalue works for discarded pattern inputs.
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def FOO : I<(outs GPR32:$dst), (ins GPR32Op:$src0, GPR32Op:$src1), []>;
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// GISEL: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS),
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// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
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// GISEL-NEXT: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::tgt_foo),
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// GISEL-NEXT: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
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// GISEL-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
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// GISEL-NEXT: GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
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// GISEL-NEXT: GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// GISEL-NEXT: // (intrinsic_w_chain:{ *:[i32] } {{[0-9]+}}:{ *:[iPTR] }, srcvalue:{ *:[i32] }, i32:{ *:[i32] }:$src1) => (FOO:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GPR32:{ *:[i32] }:$src1)
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// GISEL-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
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// GISEL-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
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// GISEL-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
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// GISEL-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
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// GISEL-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::FOO),
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// GISEL-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
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// GISEL-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
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// GISEL-NEXT: GIR_RootToRootCopy, /*OpIdx*/3, // src1
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// GISEL-NEXT: GIR_RootConstrainSelectedInstOperands,
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// GISEL-NEXT: // GIR_Coverage
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// GISEL-NEXT: GIR_EraseRootFromParent_Done,
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def : Pat <
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(int_tgt_foo (i32 srcvalue), i32:$src1),
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(FOO (IMPLICIT_DEF), GPR32:$src1)
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>;
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