derek.holloway
7502bf64a4
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72 lines
2.5 KiB
LLVM
72 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=hotcoldsplit --hotcoldsplit-max-params=1 < %s | FileCheck %s
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target datalayout = "E-m:a-p:32:32-i64:64-n32"
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define void @foo(i32 %cond) {
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; CHECK-LABEL: define void @foo(
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; CHECK-SAME: i32 [[COND:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[COND_ADDR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 [[COND]], ptr [[COND_ADDR]], align 4
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[COND_ADDR]], align 4
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; CHECK-NEXT: [[STKS:%.*]] = tail call ptr @llvm.stacksave.p0()
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label %[[IF_THEN:.*]], label %[[IF_END2:.*]]
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; CHECK: [[IF_THEN]]:
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[COND_ADDR]], align 4
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; CHECK-NEXT: call void @sink(i32 [[TMP0]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 10
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; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN1:.*]], label %[[IF_ELSE:.*]]
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; CHECK: [[IF_THEN1]]:
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; CHECK-NEXT: call void @sideeffect(i32 2)
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; CHECK-NEXT: br label %[[IF_END:.*]]
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; CHECK: [[IF_ELSE]]:
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; CHECK-NEXT: call void @sink(i32 0)
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; CHECK-NEXT: call void @sideeffect(i32 0)
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; CHECK-NEXT: call void @llvm.stackrestore.p0(ptr [[STKS]])
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; CHECK-NEXT: br label %[[IF_END]]
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; CHECK: [[IF_END]]:
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; CHECK-NEXT: br label %[[IF_END2]]
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; CHECK: [[IF_END2]]:
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; CHECK-NEXT: call void @sideeffect(i32 1)
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; CHECK-NEXT: ret void
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;
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entry:
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%cond.addr = alloca i32
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store i32 %cond, ptr %cond.addr
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%0 = load i32, ptr %cond.addr
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%stks = tail call ptr @llvm.stacksave.p0()
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%tobool = icmp ne i32 %0, 0
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br i1 %tobool, label %if.then, label %if.end2
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if.then: ; preds = %entry
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%1 = load i32, ptr %cond.addr
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call void @sink(i32 %0)
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%cmp = icmp sgt i32 %1, 10
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br i1 %cmp, label %if.then1, label %if.else
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if.then1: ; preds = %if.then
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call void @sideeffect(i32 2)
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br label %if.end
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if.else: ; preds = %if.then
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call void @sink(i32 0)
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call void @sideeffect(i32 0)
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call void @llvm.stackrestore.p0(ptr %stks)
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br label %if.end
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if.end: ; preds = %if.else, %if.then1
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br label %if.end2
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if.end2: ; preds = %entry
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call void @sideeffect(i32 1)
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ret void
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}
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declare void @sideeffect(i32)
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declare void @sink(i32) cold
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