derek.holloway
7502bf64a4
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52 lines
1.5 KiB
LLVM
52 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=verify,iroutliner -no-ir-sim-branch-matching -ir-outlining-no-cost < %s | FileCheck %s
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; Show that we do not extract sections with branches as it would require extra
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; label and control flow checking.
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define void @function1() {
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; CHECK-LABEL: @function1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret void
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;
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entry:
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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%c = alloca i32, align 4
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store i32 2, ptr %a, align 4
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store i32 3, ptr %b, align 4
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store i32 4, ptr %c, align 4
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br label %next
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next:
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ret void
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}
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define void @function2() {
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; CHECK-LABEL: @function2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret void
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;
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entry:
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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%c = alloca i32, align 4
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store i32 2, ptr %a, align 4
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store i32 3, ptr %b, align 4
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store i32 4, ptr %c, align 4
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br label %next
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next:
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ret void
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}
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