TheRock/compiler/amd-llvm/llvm/test/Transforms/InstCombine/fpcast.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; Test some floating point casting cases
; RUN: opt < %s -passes=instcombine -S | FileCheck %s

define i8 @test1() {
; CHECK-LABEL: @test1(
; CHECK-NEXT:    ret i8 -1
;
  %x = fptoui float 2.550000e+02 to i8
  ret i8 %x
}

define i8 @test2() {
; CHECK-LABEL: @test2(
; CHECK-NEXT:    ret i8 -1
;
  %x = fptosi float -1.000000e+00 to i8
  ret i8 %x
}

define half @test3(float %a) {
; CHECK-LABEL: @test3(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = call half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT:    ret half [[C]]
;
  %b = call float @llvm.fabs.f32(float %a)
  %c = fptrunc float %b to half
  ret half %c
}

define half @test3_fast(float %a) {
; CHECK-LABEL: @test3_fast(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = call fast half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT:    ret half [[C]]
;
  %b = call float @llvm.fabs.f32(float %a)
  %c = fptrunc fast float %b to half
  ret half %c
}

define half @test3_both_ninf(float %a) {
; CHECK-LABEL: @test3_both_ninf(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = call ninf half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT:    ret half [[C]]
;
  %b = call ninf float @llvm.fabs.f32(float %a)
  %c = fptrunc ninf float %b to half
  ret half %c
}

define half @test3_fabs_ninf(float %a) {
; CHECK-LABEL: @test3_fabs_ninf(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = call half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT:    ret half [[C]]
;
  %b = call ninf float @llvm.fabs.f32(float %a)
  %c = fptrunc float %b to half
  ret half %c
}

define half @test3_fptrunc_ninf(float %a) {
; CHECK-LABEL: @test3_fptrunc_ninf(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = call ninf half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT:    ret half [[C]]
;
  %b = call float @llvm.fabs.f32(float %a)
  %c = fptrunc ninf float %b to half
  ret half %c
}

define half @fneg_fptrunc(float %a) {
; CHECK-LABEL: @fneg_fptrunc(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fsub float -0.0, %a
  %c = fptrunc float %b to half
  ret half %c
}

define half @unary_fneg_fptrunc(float %a) {
; CHECK-LABEL: @unary_fneg_fptrunc(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fneg float %a
  %c = fptrunc float %b to half
  ret half %c
}

define <2 x half> @fneg_fptrunc_vec_poison(<2 x float> %a) {
; CHECK-LABEL: @fneg_fptrunc_vec_poison(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT:    [[C:%.*]] = fneg <2 x half> [[TMP1]]
; CHECK-NEXT:    ret <2 x half> [[C]]
;
  %b = fsub <2 x float> <float -0.0, float poison>, %a
  %c = fptrunc <2 x float> %b to <2 x half>
  ret <2 x half> %c
}

define <2 x half> @unary_fneg_fptrunc_vec(<2 x float> %a) {
; CHECK-LABEL: @unary_fneg_fptrunc_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT:    [[C:%.*]] = fneg <2 x half> [[TMP1]]
; CHECK-NEXT:    ret <2 x half> [[C]]
;
  %b = fneg <2 x float> %a
  %c = fptrunc <2 x float> %b to <2 x half>
  ret <2 x half> %c
}

define half @test4-fast(float %a) {
; CHECK-LABEL: @test4-fast(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc fast float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg fast half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fsub fast float -0.0, %a
  %c = fptrunc fast float %b to half
  ret half %c
}

define half @test4-mixed-fast-1(float %a) {
; CHECK-LABEL: @test4-mixed-fast-1(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fsub float -0.0, %a
  %c = fptrunc fast float %b to half
  ret half %c
}

define half @test4-mixed-fast-2(float %a) {
; CHECK-LABEL: @test4-mixed-fast-2(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fsub fast float -0.0, %a
  %c = fptrunc float %b to half
  ret half %c
}

define half @test4_unary_fneg-fast(float %a) {
; CHECK-LABEL: @test4_unary_fneg-fast(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc fast float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg fast half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fneg fast float %a
  %c = fptrunc fast float %b to half
  ret half %c
}

define half @test4_unary_fneg-mixed-fast-1(float %a) {
; CHECK-LABEL: @test4_unary_fneg-mixed-fast-1(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fneg float %a
  %c = fptrunc fast float %b to half
  ret half %c
}

define half @test4_unary_fneg-mixed-fast-2(float %a) {
; CHECK-LABEL: @test4_unary_fneg-mixed-fast-2(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT:    [[C:%.*]] = fneg half [[TMP1]]
; CHECK-NEXT:    ret half [[C]]
;
  %b = fneg fast float %a
  %c = fptrunc float %b to half
  ret half %c
}

define <2 x half> @test4_unary_fneg-vec-fast(<2 x float> %a) {
; CHECK-LABEL: @test4_unary_fneg-vec-fast(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc fast <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT:    [[C:%.*]] = fneg fast <2 x half> [[TMP1]]
; CHECK-NEXT:    ret <2 x half> [[C]]
;
  %b = fneg fast <2 x float> %a
  %c = fptrunc fast <2 x float> %b to <2 x half>
  ret <2 x half> %c
}

define <2 x half> @test4_unary_fneg-vec-mixed-fast-1(<2 x float> %a) {
; CHECK-LABEL: @test4_unary_fneg-vec-mixed-fast-1(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT:    [[C:%.*]] = fneg <2 x half> [[TMP1]]
; CHECK-NEXT:    ret <2 x half> [[C]]
;
  %b = fneg <2 x float> %a
  %c = fptrunc fast <2 x float> %b to <2 x half>
  ret <2 x half> %c
}

define <2 x half> @test4_unary_fneg-vec-mixed-fast-2(<2 x float> %a) {
; CHECK-LABEL: @test4_unary_fneg-vec-mixed-fast-2(
; CHECK-NEXT:    [[TMP1:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT:    [[C:%.*]] = fneg <2 x half> [[TMP1]]
; CHECK-NEXT:    ret <2 x half> [[C]]
;
  %b = fneg fast <2 x float> %a
  %c = fptrunc <2 x float> %b to <2 x half>
  ret <2 x half> %c
}

define half @test5(float %a, float %b, float %c) {
; CHECK-LABEL: @test5(
; CHECK-NEXT:    [[D:%.*]] = fcmp ogt float [[A:%.*]], [[B:%.*]]
; CHECK-NEXT:    [[E:%.*]] = select i1 [[D]], float [[C:%.*]], float 1.000000e+00
; CHECK-NEXT:    [[F:%.*]] = fptrunc float [[E]] to half
; CHECK-NEXT:    ret half [[F]]
;
  %d = fcmp ogt float %a, %b
  %e = select i1 %d, float %c, float 1.0
  %f = fptrunc float %e to half
  ret half %f
}

declare float @llvm.fabs.f32(float) nounwind readonly

define <1 x float> @test6(<1 x double> %V) {
; CHECK-LABEL: @test6(
; CHECK-NEXT:    [[FREM:%.*]] = frem <1 x double> [[V:%.*]], [[V]]
; CHECK-NEXT:    [[TRUNC:%.*]] = fptrunc <1 x double> [[FREM]] to <1 x float>
; CHECK-NEXT:    ret <1 x float> [[TRUNC]]
;
  %frem = frem <1 x double> %V, %V
  %trunc = fptrunc <1 x double> %frem to <1 x float>
  ret <1 x float> %trunc
}

define float @test7(double %V) {
; CHECK-LABEL: @test7(
; CHECK-NEXT:    [[FREM:%.*]] = frem double [[V:%.*]], 1.000000e+00
; CHECK-NEXT:    [[TRUNC:%.*]] = fptrunc double [[FREM]] to float
; CHECK-NEXT:    ret float [[TRUNC]]
;
  %frem = frem double %V, 1.000000e+00
  %trunc = fptrunc double %frem to float
  ret float %trunc
}

define float @test8(float %V) {
; CHECK-LABEL: @test8(
; CHECK-NEXT:    [[FEXT:%.*]] = fpext float [[V:%.*]] to double
; CHECK-NEXT:    [[FREM:%.*]] = frem double [[FEXT]], 1.000000e-01
; CHECK-NEXT:    [[TRUNC:%.*]] = fptrunc double [[FREM]] to float
; CHECK-NEXT:    ret float [[TRUNC]]
;
  %fext = fpext float %V to double
  %frem = frem double %fext, 1.000000e-01
  %trunc = fptrunc double %frem to float
  ret float %trunc
}

define half @test_fptrunc_fptrunc(double %V) {
; CHECK-LABEL: @test_fptrunc_fptrunc(
; CHECK-NEXT:    [[T1:%.*]] = fptrunc double [[V:%.*]] to float
; CHECK-NEXT:    [[T2:%.*]] = fptrunc float [[T1]] to half
; CHECK-NEXT:    ret half [[T2]]
;
  %t1 = fptrunc double %V to float
  %t2 = fptrunc float %t1 to half
  ret half %t2
}

define half @sint_to_fptrunc(i32 %x) {
; CHECK-LABEL: @sint_to_fptrunc(
; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[X:%.*]] to float
; CHECK-NEXT:    [[R:%.*]] = fptrunc float [[F]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %f = sitofp i32 %x to float
  %r = fptrunc float %f to half
  ret half %r
}

define half @masked_sint_to_fptrunc1(i32 %x) {
; CHECK-LABEL: @masked_sint_to_fptrunc1(
; CHECK-NEXT:    [[M:%.*]] = and i32 [[X:%.*]], 16777215
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %m = and i32 %x, 16777215
  %f = sitofp i32 %m to float
  %r = fptrunc float %f to half
  ret half %r
}

define half @masked_sint_to_fptrunc2(i32 %x) {
; CHECK-LABEL: @masked_sint_to_fptrunc2(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 8
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %m = lshr i32 %x, 8
  %f = sitofp i32 %m to float
  %r = fptrunc float %f to half
  ret half %r
}

define half @masked_sint_to_fptrunc3(i32 %x) {
; CHECK-LABEL: @masked_sint_to_fptrunc3(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 7
; CHECK-NEXT:    [[F:%.*]] = uitofp nneg i32 [[M]] to float
; CHECK-NEXT:    [[R:%.*]] = fptrunc float [[F]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %m = lshr i32 %x, 7
  %f = sitofp i32 %m to float
  %r = fptrunc float %f to half
  ret half %r
}

define double @sint_to_fpext(i32 %x) {
; CHECK-LABEL: @sint_to_fpext(
; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[X:%.*]] to float
; CHECK-NEXT:    [[R:%.*]] = fpext float [[F]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %f = sitofp i32 %x to float
  %r = fpext float %f to double
  ret double %r
}

define double @masked_sint_to_fpext1(i32 %x) {
; CHECK-LABEL: @masked_sint_to_fpext1(
; CHECK-NEXT:    [[M:%.*]] = and i32 [[X:%.*]], 16777215
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %m = and i32 %x, 16777215
  %f = sitofp i32 %m to float
  %r = fpext float %f to double
  ret double %r
}

define double @masked_sint_to_fpext2(i32 %x) {
; CHECK-LABEL: @masked_sint_to_fpext2(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 8
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %m = lshr i32 %x, 8
  %f = sitofp i32 %m to float
  %r = fpext float %f to double
  ret double %r
}

define double @masked_sint_to_fpext3(i32 %x) {
; CHECK-LABEL: @masked_sint_to_fpext3(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 7
; CHECK-NEXT:    [[F:%.*]] = uitofp nneg i32 [[M]] to float
; CHECK-NEXT:    [[R:%.*]] = fpext float [[F]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %m = lshr i32 %x, 7
  %f = sitofp i32 %m to float
  %r = fpext float %f to double
  ret double %r
}

define half @uint_to_fptrunc(i32 %x) {
; CHECK-LABEL: @uint_to_fptrunc(
; CHECK-NEXT:    [[F:%.*]] = uitofp i32 [[X:%.*]] to float
; CHECK-NEXT:    [[R:%.*]] = fptrunc float [[F]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %f = uitofp i32 %x to float
  %r = fptrunc float %f to half
  ret half %r
}

define half @masked_uint_to_fptrunc1(i32 %x) {
; CHECK-LABEL: @masked_uint_to_fptrunc1(
; CHECK-NEXT:    [[M:%.*]] = and i32 [[X:%.*]], 16777215
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %m = and i32 %x, 16777215
  %f = uitofp i32 %m to float
  %r = fptrunc float %f to half
  ret half %r
}

define half @masked_uint_to_fptrunc2(i32 %x) {
; CHECK-LABEL: @masked_uint_to_fptrunc2(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 8
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %m = lshr i32 %x, 8
  %f = uitofp i32 %m to float
  %r = fptrunc float %f to half
  ret half %r
}

define half @masked_uint_to_fptrunc3(i32 %x) {
; CHECK-LABEL: @masked_uint_to_fptrunc3(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 7
; CHECK-NEXT:    [[F:%.*]] = uitofp nneg i32 [[M]] to float
; CHECK-NEXT:    [[R:%.*]] = fptrunc float [[F]] to half
; CHECK-NEXT:    ret half [[R]]
;
  %m = lshr i32 %x, 7
  %f = uitofp i32 %m to float
  %r = fptrunc float %f to half
  ret half %r
}

define double @uint_to_fpext(i32 %x) {
; CHECK-LABEL: @uint_to_fpext(
; CHECK-NEXT:    [[F:%.*]] = uitofp i32 [[X:%.*]] to float
; CHECK-NEXT:    [[R:%.*]] = fpext float [[F]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %f = uitofp i32 %x to float
  %r = fpext float %f to double
  ret double %r
}

define double @masked_uint_to_fpext1(i32 %x) {
; CHECK-LABEL: @masked_uint_to_fpext1(
; CHECK-NEXT:    [[M:%.*]] = and i32 [[X:%.*]], 16777215
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %m = and i32 %x, 16777215
  %f = uitofp i32 %m to float
  %r = fpext float %f to double
  ret double %r
}

define double @masked_uint_to_fpext2(i32 %x) {
; CHECK-LABEL: @masked_uint_to_fpext2(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 8
; CHECK-NEXT:    [[R:%.*]] = uitofp nneg i32 [[M]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %m = lshr i32 %x, 8
  %f = uitofp i32 %m to float
  %r = fpext float %f to double
  ret double %r
}

define double @masked_uint_to_fpext3(i32 %x) {
; CHECK-LABEL: @masked_uint_to_fpext3(
; CHECK-NEXT:    [[M:%.*]] = lshr i32 [[X:%.*]], 7
; CHECK-NEXT:    [[F:%.*]] = uitofp nneg i32 [[M]] to float
; CHECK-NEXT:    [[R:%.*]] = fpext float [[F]] to double
; CHECK-NEXT:    ret double [[R]]
;
  %m = lshr i32 %x, 7
  %f = uitofp i32 %m to float
  %r = fpext float %f to double
  ret double %r
}

define i32 @fptosi_nonnorm(float nofpclass(norm) %x) {
; CHECK-LABEL: @fptosi_nonnorm(
; CHECK-NEXT:    ret i32 0
;
  %ret = fptosi float %x to i32
  ret i32 %ret
}

define i32 @fptoui_nonnorm(float nofpclass(pnorm) %x) {
; CHECK-LABEL: @fptoui_nonnorm(
; CHECK-NEXT:    ret i32 0
;
  %ret = fptoui float %x to i32
  ret i32 %ret
}

define i32 @fptosi_nonnnorm(float nofpclass(nnorm) %x) {
; CHECK-LABEL: @fptosi_nonnnorm(
; CHECK-NEXT:    [[RET:%.*]] = fptosi float [[X:%.*]] to i32
; CHECK-NEXT:    ret i32 [[RET]]
;
  %ret = fptosi float %x to i32
  ret i32 %ret
}

define i32 @fptoui_nonnnorm(float nofpclass(nnorm) %x) {
; CHECK-LABEL: @fptoui_nonnnorm(
; CHECK-NEXT:    [[RET:%.*]] = fptoui float [[X:%.*]] to i32
; CHECK-NEXT:    ret i32 [[RET]]
;
  %ret = fptoui float %x to i32
  ret i32 %ret
}

define i32 @fptosi_nonnorm_copysign(float %x) {
; CHECK-LABEL: @fptosi_nonnorm_copysign(
; CHECK-NEXT:    ret i32 0
;
  %val = call float @llvm.copysign.f32(float 0.0, float %x)
  %ret = fptosi float %val to i32
  ret i32 %ret
}

define <2 x i32> @fptosi_nonnorm_copysign_vec(<2 x float> %x) {
; CHECK-LABEL: @fptosi_nonnorm_copysign_vec(
; CHECK-NEXT:    ret <2 x i32> zeroinitializer
;
  %val = call <2 x float> @llvm.copysign.v2f32(<2 x float> zeroinitializer, <2 x float> %x)
  %ret = fptosi <2 x float> %val to <2 x i32>
  ret <2 x i32> %ret
}

define i32 @fptosi_nonnorm_fmul(float %x) {
; CHECK-LABEL: @fptosi_nonnorm_fmul(
; CHECK-NEXT:    ret i32 0
;
  %sel = fmul float %x, 0.000000e+00
  %ret = fptosi float %sel to i32
  ret i32 %ret
}

define i32 @fptosi_select(i1 %cond) {
; CHECK-LABEL: @fptosi_select(
; CHECK-NEXT:    [[RET:%.*]] = select i1 [[COND:%.*]], i32 1, i32 -1
; CHECK-NEXT:    ret i32 [[RET]]
;
  %sel = select i1 %cond, float 1.0, float -1.0
  %ret = fptosi float %sel to i32
  ret i32 %ret
}

define i32 @mul_pos_zero_convert(i32 %a) {
; CHECK-LABEL: @mul_pos_zero_convert(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    ret i32 0
;
entry:
  %fp = sitofp i32 %a to float
  %ret = fmul float %fp, 0.000000e+00
  %conv = fptosi float %ret to i32
  ret i32 %conv
}

define i32 @signbits_sitofp_fptosi_roundtrip(i32 %x) {
; CHECK-LABEL: @signbits_sitofp_fptosi_roundtrip(
; CHECK-NEXT:    [[M:%.*]] = ashr i32 [[X:%.*]], 7
; CHECK-NEXT:    ret i32 [[M]]
;
  %m = ashr i32 %x, 7
  %f = sitofp i32 %m to float
  %r = fptosi float %f to i32
  ret i32 %r
}

define <4 x i32> @signbits_sitofp_fptosi_roundtrip_vec(<4 x i32> %x) {
; CHECK-LABEL: @signbits_sitofp_fptosi_roundtrip_vec(
; CHECK-NEXT:    [[M:%.*]] = ashr <4 x i32> [[X:%.*]], splat (i32 7)
; CHECK-NEXT:    ret <4 x i32> [[M]]
;
  %m = ashr <4 x i32> %x, splat (i32 7)
  %f = sitofp <4 x i32> %m to <4 x float>
  %r = fptosi <4 x float> %f to <4 x i32>
  ret <4 x i32> %r
}

; Negative: 26 significant bits, 25 mantissa > 24.
define i32 @signbits_sitofp_fptosi_roundtrip_neg(i32 %x) {
; CHECK-LABEL: @signbits_sitofp_fptosi_roundtrip_neg(
; CHECK-NEXT:    [[M:%.*]] = ashr i32 [[X:%.*]], 6
; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[M]] to float
; CHECK-NEXT:    [[R:%.*]] = fptosi float [[F]] to i32
; CHECK-NEXT:    ret i32 [[R]]
;
  %m = ashr i32 %x, 6
  %f = sitofp i32 %m to float
  %r = fptosi float %f to i32
  ret i32 %r
}

define <8 x i16> @fptoui_sat_uitofp_zext_i8(<8 x i8> %a) {
; CHECK-LABEL: @fptoui_sat_uitofp_zext_i8(
; CHECK-NEXT:    [[CVT:%.*]] = zext <8 x i8> [[A:%.*]] to <8 x i16>
; CHECK-NEXT:    ret <8 x i16> [[CVT]]
;
  %zext = zext <8 x i8> %a to <8 x i16>
  %fp = uitofp <8 x i16> %zext to <8 x half>
  %cvt = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f16(<8 x half> %fp)
  ret <8 x i16> %cvt
}

define <8 x i16> @fptoui_sat_uitofp_and_11bits(<8 x i16> %a) {
; CHECK-LABEL: @fptoui_sat_uitofp_and_11bits(
; CHECK-NEXT:    [[MASKED:%.*]] = and <8 x i16> [[A:%.*]], splat (i16 2047)
; CHECK-NEXT:    ret <8 x i16> [[MASKED]]
;
  %masked = and <8 x i16> %a, splat (i16 2047)
  %fp = uitofp <8 x i16> %masked to <8 x half>
  %cvt = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f16(<8 x half> %fp)
  ret <8 x i16> %cvt
}

define <4 x i32> @fptosi_sat_sitofp_sext_i16(<4 x i16> %a) {
; CHECK-LABEL: @fptosi_sat_sitofp_sext_i16(
; CHECK-NEXT:    [[CVT:%.*]] = sext <4 x i16> [[A:%.*]] to <4 x i32>
; CHECK-NEXT:    ret <4 x i32> [[CVT]]
;
  %sext = sext <4 x i16> %a to <4 x i32>
  %fp = sitofp <4 x i32> %sext to <4 x float>
  %cvt = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> %fp)
  ret <4 x i32> %cvt
}

define <4 x i16> @fptoui_sat_uitofp_and_255(<4 x i16> %a) {
; CHECK-LABEL: @fptoui_sat_uitofp_and_255(
; CHECK-NEXT:    [[MASKED:%.*]] = and <4 x i16> [[A:%.*]], splat (i16 255)
; CHECK-NEXT:    ret <4 x i16> [[MASKED]]
;
  %masked = and <4 x i16> %a, splat (i16 255)
  %fp = uitofp <4 x i16> %masked to <4 x half>
  %cvt = call <4 x i16> @llvm.fptoui.sat.v4i16.v4f16(<4 x half> %fp)
  ret <4 x i16> %cvt
}

define <4 x i32> @fptoui_sat_uitofp_widen_i16_to_i32(<4 x i16> %a) {
; CHECK-LABEL: @fptoui_sat_uitofp_widen_i16_to_i32(
; CHECK-NEXT:    [[CVT:%.*]] = zext <4 x i16> [[A:%.*]] to <4 x i32>
; CHECK-NEXT:    ret <4 x i32> [[CVT]]
;
  %fp = uitofp <4 x i16> %a to <4 x float>
  %cvt = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> %fp)
  ret <4 x i32> %cvt
}

define i32 @fptoui_sat_uitofp_scalar_widen(i16 %a) {
; CHECK-LABEL: @fptoui_sat_uitofp_scalar_widen(
; CHECK-NEXT:    [[CVT:%.*]] = zext i16 [[A:%.*]] to i32
; CHECK-NEXT:    ret i32 [[CVT]]
;
  %fp = uitofp i16 %a to float
  %cvt = call i32 @llvm.fptoui.sat.i32.f32(float %fp)
  ret i32 %cvt
}

define i32 @fptosi_sat_sitofp_scalar_widen(i16 %a) {
; CHECK-LABEL: @fptosi_sat_sitofp_scalar_widen(
; CHECK-NEXT:    [[CVT:%.*]] = sext i16 [[A:%.*]] to i32
; CHECK-NEXT:    ret i32 [[CVT]]
;
  %fp = sitofp i16 %a to float
  %cvt = call i32 @llvm.fptosi.sat.i32.f32(float %fp)
  ret i32 %cvt
}

define <2 x i64> @fptosi_sat_sitofp_double_widen(<2 x i32> %a) {
; CHECK-LABEL: @fptosi_sat_sitofp_double_widen(
; CHECK-NEXT:    [[CVT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
; CHECK-NEXT:    ret <2 x i64> [[CVT]]
;
  %fp = sitofp <2 x i32> %a to <2 x double>
  %cvt = call <2 x i64> @llvm.fptosi.sat.v2i64.v2f64(<2 x double> %fp)
  ret <2 x i64> %cvt
}

define <2 x i64> @fptoui_sat_uitofp_double_widen(<2 x i32> %a) {
; CHECK-LABEL: @fptoui_sat_uitofp_double_widen(
; CHECK-NEXT:    [[CVT:%.*]] = zext <2 x i32> [[A:%.*]] to <2 x i64>
; CHECK-NEXT:    ret <2 x i64> [[CVT]]
;
  %fp = uitofp <2 x i32> %a to <2 x double>
  %cvt = call <2 x i64> @llvm.fptoui.sat.v2i64.v2f64(<2 x double> %fp)
  ret <2 x i64> %cvt
}

; Negative: narrowing
define <4 x i16> @neg_fptoui_sat_uitofp_narrow_known_bits(<4 x i32> %a) {
; CHECK-LABEL: @neg_fptoui_sat_uitofp_narrow_known_bits(
; CHECK-NEXT:    [[MASKED:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 255)
; CHECK-NEXT:    [[FP:%.*]] = uitofp nneg <4 x i32> [[MASKED]] to <4 x float>
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i16> @llvm.fptoui.sat.v4i16.v4f32(<4 x float> [[FP]])
; CHECK-NEXT:    ret <4 x i16> [[CVT]]
;
  %masked = and <4 x i32> %a, splat (i32 255)
  %fp = uitofp <4 x i32> %masked to <4 x float>
  %cvt = call <4 x i16> @llvm.fptoui.sat.v4i16.v4f32(<4 x float> %fp)
  ret <4 x i16> %cvt
}

; Negative: narrowing
define <4 x i16> @neg_fptosi_sat_sitofp_narrow(<4 x i32> %a) {
; CHECK-LABEL: @neg_fptosi_sat_sitofp_narrow(
; CHECK-NEXT:    [[MASKED:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 255)
; CHECK-NEXT:    [[FP:%.*]] = uitofp nneg <4 x i32> [[MASKED]] to <4 x float>
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i16> @llvm.fptosi.sat.v4i16.v4f32(<4 x float> [[FP]])
; CHECK-NEXT:    ret <4 x i16> [[CVT]]
;
  %masked = and <4 x i32> %a, splat (i32 255)
  %fp = sitofp <4 x i32> %masked to <4 x float>
  %cvt = call <4 x i16> @llvm.fptosi.sat.v4i16.v4f32(<4 x float> %fp)
  ret <4 x i16> %cvt
}

; Negative: 16 > 11 (half mantissa), not exact
define <8 x i16> @neg_fptoui_sat_uitofp_full_i16(<8 x i16> %a) {
; CHECK-LABEL: @neg_fptoui_sat_uitofp_full_i16(
; CHECK-NEXT:    [[FP:%.*]] = uitofp <8 x i16> [[A:%.*]] to <8 x half>
; CHECK-NEXT:    [[CVT:%.*]] = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f16(<8 x half> [[FP]])
; CHECK-NEXT:    ret <8 x i16> [[CVT]]
;
  %fp = uitofp <8 x i16> %a to <8 x half>
  %cvt = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f16(<8 x half> %fp)
  ret <8 x i16> %cvt
}

; Negative: 12 > 11 (half mantissa), not exact
define <8 x i16> @neg_fptoui_sat_uitofp_12bits(<8 x i16> %a) {
; CHECK-LABEL: @neg_fptoui_sat_uitofp_12bits(
; CHECK-NEXT:    [[MASKED:%.*]] = and <8 x i16> [[A:%.*]], splat (i16 4095)
; CHECK-NEXT:    [[FP:%.*]] = uitofp nneg <8 x i16> [[MASKED]] to <8 x half>
; CHECK-NEXT:    [[CVT:%.*]] = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f16(<8 x half> [[FP]])
; CHECK-NEXT:    ret <8 x i16> [[CVT]]
;
  %masked = and <8 x i16> %a, splat (i16 4095)
  %fp = uitofp <8 x i16> %masked to <8 x half>
  %cvt = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f16(<8 x half> %fp)
  ret <8 x i16> %cvt
}

; Negative: cross-sign
define <4 x i32> @neg_fptosi_sat_uitofp_cross_sign(<4 x i32> %a) {
; CHECK-LABEL: @neg_fptosi_sat_uitofp_cross_sign(
; CHECK-NEXT:    [[FP:%.*]] = uitofp <4 x i32> [[A:%.*]] to <4 x float>
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[FP]])
; CHECK-NEXT:    ret <4 x i32> [[CVT]]
;
  %fp = uitofp <4 x i32> %a to <4 x float>
  %cvt = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> %fp)
  ret <4 x i32> %cvt
}

; Negative: cross-sign
define <4 x i32> @neg_fptoui_sat_sitofp_cross_sign(<4 x i32> %a) {
; CHECK-LABEL: @neg_fptoui_sat_sitofp_cross_sign(
; CHECK-NEXT:    [[FP:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float>
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> [[FP]])
; CHECK-NEXT:    ret <4 x i32> [[CVT]]
;
  %fp = sitofp <4 x i32> %a to <4 x float>
  %cvt = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> %fp)
  ret <4 x i32> %cvt
}

; Negative: narrowing, exact but doesn't fit
define <4 x i16> @neg_fptoui_sat_uitofp_narrow_no_fit(<4 x i32> %a) {
; CHECK-LABEL: @neg_fptoui_sat_uitofp_narrow_no_fit(
; CHECK-NEXT:    [[MASKED:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 16777215)
; CHECK-NEXT:    [[FP:%.*]] = uitofp nneg <4 x i32> [[MASKED]] to <4 x float>
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i16> @llvm.fptoui.sat.v4i16.v4f32(<4 x float> [[FP]])
; CHECK-NEXT:    ret <4 x i16> [[CVT]]
;
  %masked = and <4 x i32> %a, splat (i32 16777215)
  %fp = uitofp <4 x i32> %masked to <4 x float>
  %cvt = call <4 x i16> @llvm.fptoui.sat.v4i16.v4f32(<4 x float> %fp)
  ret <4 x i16> %cvt
}

; Negative: not a uitofp/sitofp source
define <4 x i32> @neg_fptoui_sat_no_cast(<4 x float> %fp) {
; CHECK-LABEL: @neg_fptoui_sat_no_cast(
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> [[FP:%.*]])
; CHECK-NEXT:    ret <4 x i32> [[CVT]]
;
  %cvt = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> %fp)
  ret <4 x i32> %cvt
}

; Negative: non-integer cast feeding fptoui.sat
define <4 x i32> @neg_fptoui_sat_fptrunc(<4 x double> %a) {
; CHECK-LABEL: @neg_fptoui_sat_fptrunc(
; CHECK-NEXT:    [[TRUNC:%.*]] = fptrunc <4 x double> [[A:%.*]] to <4 x float>
; CHECK-NEXT:    [[CVT:%.*]] = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> [[TRUNC]])
; CHECK-NEXT:    ret <4 x i32> [[CVT]]
;
  %trunc = fptrunc <4 x double> %a to <4 x float>
  %cvt = call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> %trunc)
  ret <4 x i32> %cvt
}