derek.holloway
7502bf64a4
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49 lines
1.5 KiB
LLVM
49 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes='loop(loop-rotate,loop-deletion)' -S | FileCheck %s
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target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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define void @main() {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[L0_PREHEADER:%.*]]
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; CHECK: L0.L0.preheader.loopexit_crit_edge:
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; CHECK-NEXT: br label [[L0_PREHEADER_LOOPEXIT:%.*]]
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; CHECK: L0.preheader.loopexit:
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; CHECK-NEXT: br label [[L0_PREHEADER]]
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; CHECK: L0.preheader:
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, 0
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; CHECK-NEXT: [[INC:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: [[TOBOOL3_NOT1:%.*]] = icmp eq i32 [[INC]], 0
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; CHECK-NEXT: br i1 [[TOBOOL3_NOT1]], label [[L0_PREHEADER_LOOPEXIT]], label [[L1_PREHEADER_LR_PH:%.*]]
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; CHECK: L1.preheader.lr.ph:
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; CHECK-NEXT: br label [[L0_L0_PREHEADER_LOOPEXIT_CRIT_EDGE:%.*]]
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;
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entry:
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br label %L0.preheader
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L0.preheader:
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br label %L0
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L0: ; preds = %L0.latch, %L0.preheader
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%k.0 = phi i32 [ 0, %L0.preheader ], [ %spec.select, %L0.latch ]
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%cmp = icmp slt i32 0, 0
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%inc = zext i1 %cmp to i32
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%spec.select = add nsw i32 %k.0, %inc
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%tobool3.not = icmp eq i32 %spec.select, 0
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br i1 %tobool3.not, label %L0.preheader, label %L1.preheader
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L1.preheader:
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%tobool8.not = icmp eq i32 %k.0, 0
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br label %L1
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L1:
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br i1 %tobool8.not, label %L1.latch, label %L0.latch
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L1.latch:
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br i1 false, label %L1, label %L0.latch
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L0.latch:
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br label %L0
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}
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