derek.holloway
7502bf64a4
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40 lines
1.0 KiB
LLVM
40 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; REQUIRES: asserts
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(loop-simplifycfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes=loop-simplifycfg -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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; Make sure we update MSSA properly.
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define void @test(ptr %a, ptr %b) {
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; CHECK-LABEL: @test(
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entry:
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br label %for.body
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for.body:
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%i = phi i32 [ 0, %entry ], [ %i.inc, %latch ]
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br label %switch.bb
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switch.bb:
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switch i2 1, label %default [
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i2 1, label %case
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]
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case:
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br label %latch
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default:
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unreachable
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latch:
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store i32 %i, ptr %a
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store i32 %i, ptr %b
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%i.inc = add nsw i32 %i, 1
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%exitcond = icmp eq i32 %i.inc, 4
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br i1 %exitcond, label %exit, label %for.body
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exit:
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ret void
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}
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