derek.holloway
7502bf64a4
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44 lines
1.5 KiB
LLVM
44 lines
1.5 KiB
LLVM
; RUN: opt < %s -loop-reduce -S | FileCheck %s
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target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-nvidia-cuda"
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; This confirms that NVPTXTTI considers a 64-to-32 integer trunc free. If such
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; truncs were not considered free, LSR would promote (int)i as a separate
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; induction variable in the following example.
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;
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; for (long i = begin; i != end; i += stride)
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; use((int)i);
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;
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; That would be worthless, because "i" is simulated by two 32-bit registers and
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; truncating it to 32-bit is as simple as directly using the register that
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; contains the low bits.
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define ptx_kernel void @trunc_is_free(i64 %begin, i64 %stride, i64 %end) {
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; CHECK-LABEL: @trunc_is_free(
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entry:
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%cmp.4 = icmp eq i64 %begin, %end
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br i1 %cmp.4, label %for.cond.cleanup, label %for.body.preheader
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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ret void
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for.body: ; preds = %for.body.preheader, %for.body
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; CHECK: for.body:
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%i.05 = phi i64 [ %add, %for.body ], [ %begin, %for.body.preheader ]
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%conv = trunc i64 %i.05 to i32
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; CHECK: trunc i64 %{{[^ ]+}} to i32
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tail call void @_Z3usei(i32 %conv) #2
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%add = add nsw i64 %i.05, %stride
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%cmp = icmp eq i64 %add, %end
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br i1 %cmp, label %for.cond.cleanup.loopexit, label %for.body
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}
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declare void @_Z3usei(i32)
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