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TheRock/compiler/amd-llvm/llvm/test/Transforms/LoopVectorize/pr154045-dont-fold-extractelement-livein.ll
derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

45 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
; RUN: opt -p loop-vectorize -force-vector-width=2 -force-widen-divrem-via-masked-intrinsic=false -S %s | FileCheck %s
; Make sure we don't try to fold a Instruction::ExtractElement ir<0>, ir<0>,
; since we can't materialize the live-in for the vector operand.
define void @pr154045(ptr %p, i1 %c, i64 %x) {
; CHECK-LABEL: define void @pr154045(
; CHECK-SAME: ptr [[P:%.*]], i1 [[C:%.*]], i64 [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK: [[VECTOR_BODY]]:
; CHECK-NEXT: store i32 0, ptr [[P]], align 4
; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]
; CHECK: [[MIDDLE_BLOCK]]:
; CHECK-NEXT: br label %[[EXIT:.*]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %loop
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
br i1 %c, label %latch, label %else
else:
%rem = srem i64 0, %x
br label %latch
latch:
%phi = phi i64 [ %rem, %else ], [ 0, %loop ]
%phi.trunc = trunc i64 %phi to i32
%shl = shl i32 %phi.trunc, 0
store i32 %shl, ptr %p
%iv.next = add i64 %iv, 1
%exitcond = icmp eq i64 %iv, 1
br i1 %exitcond, label %exit, label %loop
exit:
ret void
}