derek.holloway
7502bf64a4
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77 lines
3.6 KiB
LLVM
77 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
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; RUN: opt -S < %s -p loop-vectorize -force-vector-width=4 | FileCheck %s
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; TODO: Recipe used only in the early exit block can be sunk there.
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declare void @init_mem(ptr, i64)
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define i64 @sink_to_early_exit(i64 %offset) {
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; CHECK-LABEL: define i64 @sink_to_early_exit(
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; CHECK-SAME: i64 [[OFFSET:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 4
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; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i8], align 4
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; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024)
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; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024)
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; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[OFFSET]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX2:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT4:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ]
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; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY_INTERIM]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 [[INDEX2]]
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP0]], align 1
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P2]], i64 [[INDEX2]]
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; CHECK-NEXT: [[WIDE_LOAD3:%.*]] = load <4 x i8>, ptr [[TMP1]], align 1
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <4 x i8> [[WIDE_LOAD]], [[WIDE_LOAD3]]
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; CHECK-NEXT: [[TMP4:%.*]] = freeze <4 x i1> [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP4]])
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; CHECK-NEXT: [[INDEX_NEXT4]] = add nuw i64 [[INDEX2]], 4
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; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT4]], 1024
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; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)
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; CHECK-NEXT: br i1 [[TMP5]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]]
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; CHECK: [[VECTOR_BODY_INTERIM]]:
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; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br label %[[LOOP_END:.*]]
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; CHECK: [[VECTOR_EARLY_EXIT]]:
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; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[FIRST_ACTIVE_LANE:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP3]], i1 false)
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[TMP2]], i64 [[FIRST_ACTIVE_LANE]]
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; CHECK-NEXT: br label %[[LOOP_EARLY_EXIT:.*]]
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; CHECK: [[LOOP_EARLY_EXIT]]:
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; CHECK-NEXT: ret i64 [[TMP7]]
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; CHECK: [[LOOP_END]]:
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; CHECK-NEXT: ret i64 0
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;
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entry:
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%p1 = alloca [1024 x i8], align 4
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%p2 = alloca [1024 x i8], align 4
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call void @init_mem(ptr %p1, i64 1024)
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call void @init_mem(ptr %p2, i64 1024)
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br label %loop
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loop:
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%index = phi i64 [ %index.next, %loop.inc ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i8, ptr %p1, i64 %index
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%ld1 = load i8, ptr %arrayidx, align 1
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%arrayidx1 = getelementptr inbounds i8, ptr %p2, i64 %index
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%ld2 = load i8, ptr %arrayidx1, align 1
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%result = add i64 %index, %offset
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%cmp = icmp eq i8 %ld1, %ld2
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br i1 %cmp, label %loop.inc, label %loop.early.exit
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loop.inc:
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%index.next = add i64 %index, 1
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%exitcond = icmp ne i64 %index.next, 1024
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br i1 %exitcond, label %loop, label %loop.end
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loop.early.exit:
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ret i64 %result
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loop.end:
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ret i64 0
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}
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