derek.holloway
7502bf64a4
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110 lines
6.2 KiB
LLVM
110 lines
6.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
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; RUN: opt -passes=loop-vectorize -force-vector-width=4 -tail-folding-policy=prefer-fold-tail -S %s | FileCheck %s
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define void @f(ptr %p, i64 %n) {
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; CHECK-LABEL: define void @f(
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; CHECK-SAME: ptr [[P:%.*]], i64 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], 3
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 4
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
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; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE12:.*]] ]
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; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE12]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 3
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ule <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[P]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[P]], i64 [[TMP0]]
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[P]], i64 [[TMP1]]
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; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i32, ptr [[P]], i64 [[TMP2]]
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; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0
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; CHECK-NEXT: br i1 [[TMP12]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
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; CHECK: [[PRED_LOAD_IF]]:
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; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP4]], align 4
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; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> poison, i32 [[TMP13]], i64 0
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; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
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; CHECK: [[PRED_LOAD_CONTINUE]]:
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; CHECK-NEXT: [[TMP15:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP14]], %[[PRED_LOAD_IF]] ]
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; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1
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; CHECK-NEXT: br i1 [[TMP16]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2:.*]]
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; CHECK: [[PRED_LOAD_IF1]]:
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; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 4
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; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP15]], i32 [[TMP17]], i64 1
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; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
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; CHECK: [[PRED_LOAD_CONTINUE2]]:
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; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP15]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP18]], %[[PRED_LOAD_IF1]] ]
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; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP3]], i64 2
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; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_LOAD_IF3:.*]], label %[[PRED_LOAD_CONTINUE4:.*]]
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; CHECK: [[PRED_LOAD_IF3]]:
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; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP6]], align 4
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; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP21]], i64 2
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; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE4]]
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; CHECK: [[PRED_LOAD_CONTINUE4]]:
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; CHECK-NEXT: [[TMP23:%.*]] = phi <4 x i32> [ [[TMP19]], %[[PRED_LOAD_CONTINUE2]] ], [ [[TMP22]], %[[PRED_LOAD_IF3]] ]
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; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3
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; CHECK-NEXT: br i1 [[TMP24]], label %[[PRED_LOAD_IF5:.*]], label %[[PRED_LOAD_CONTINUE6:.*]]
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; CHECK: [[PRED_LOAD_IF5]]:
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; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP7]], align 4
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; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP23]], i32 [[TMP25]], i64 3
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; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE6]]
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; CHECK: [[PRED_LOAD_CONTINUE6]]:
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; CHECK-NEXT: [[TMP27:%.*]] = phi <4 x i32> [ [[TMP23]], %[[PRED_LOAD_CONTINUE4]] ], [ [[TMP26]], %[[PRED_LOAD_IF5]] ]
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; CHECK-NEXT: [[TMP28:%.*]] = add <4 x i32> [[TMP27]], splat (i32 1)
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; CHECK-NEXT: br i1 [[TMP12]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
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; CHECK: [[PRED_STORE_IF]]:
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; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[TMP28]], i64 0
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; CHECK-NEXT: store i32 [[TMP30]], ptr [[TMP4]], align 4
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; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]]
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; CHECK: [[PRED_STORE_CONTINUE]]:
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; CHECK-NEXT: br i1 [[TMP16]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]]
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; CHECK: [[PRED_STORE_IF7]]:
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; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x i32> [[TMP28]], i64 1
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; CHECK-NEXT: store i32 [[TMP32]], ptr [[TMP5]], align 4
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; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE8]]
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; CHECK: [[PRED_STORE_CONTINUE8]]:
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; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]]
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; CHECK: [[PRED_STORE_IF9]]:
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; CHECK-NEXT: [[TMP34:%.*]] = extractelement <4 x i32> [[TMP28]], i64 2
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; CHECK-NEXT: store i32 [[TMP34]], ptr [[TMP6]], align 4
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; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE10]]
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; CHECK: [[PRED_STORE_CONTINUE10]]:
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; CHECK-NEXT: br i1 [[TMP24]], label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12]]
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; CHECK: [[PRED_STORE_IF11]]:
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; CHECK-NEXT: [[TMP36:%.*]] = extractelement <4 x i32> [[TMP28]], i64 3
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; CHECK-NEXT: store i32 [[TMP36]], ptr [[TMP7]], align 4
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; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE12]]
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; CHECK: [[PRED_STORE_CONTINUE12]]:
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; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
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; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw <4 x i64> [[VEC_IND]], splat (i64 4)
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; CHECK-NEXT: [[TMP37:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP37]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br label %[[EXIT:.*]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep = getelementptr i32, ptr %p, i64 %iv
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%x = load i32, ptr %gep
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%y = add i32 %x, 1
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store i32 %y, ptr %gep
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv.next, %n
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br i1 %ec, label %exit, label %loop
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exit:
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ret void
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}
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