derek.holloway
7502bf64a4
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33 lines
1.4 KiB
LLVM
33 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
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; RUN: opt < %s -passes=rel-lookup-table-converter -relocation-model=pic -S | FileCheck %s
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; REQUIRES: nvptx-registered-target
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target triple = "nvptx64-nvidia-cuda"
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; Do not produce relative lookup table for nvptx target.
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@a1 = internal constant i32 0, align 4
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@b1 = internal constant i32 0, align 4
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@c1 = internal constant i32 0, align 4
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@d1 = internal constant i32 0, align 4
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@switch.table = private unnamed_addr constant [3 x ptr] [ptr @a1, ptr @b1, ptr @c1], align 8
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;.
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; CHECK: @a1 = internal constant i32 0, align 4
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; CHECK: @b1 = internal constant i32 0, align 4
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; CHECK: @c1 = internal constant i32 0, align 4
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; CHECK: @d1 = internal constant i32 0, align 4
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; CHECK: @switch.table = private unnamed_addr constant [3 x ptr] [ptr @a1, ptr @b1, ptr @c1], align 8
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;.
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define ptr @internal_linkage(i32 %cond) {
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; CHECK-LABEL: define ptr @internal_linkage(
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; CHECK-SAME: i32 [[COND:%.*]]) {
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; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x ptr], ptr @switch.table, i32 0, i32 [[COND]]
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; CHECK-NEXT: [[RELTABLE_INTRINSIC:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
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; CHECK-NEXT: ret ptr [[RELTABLE_INTRINSIC]]
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;
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%switch.gep = getelementptr inbounds [3 x ptr], ptr @switch.table, i32 0, i32 %cond
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%switch.load = load ptr, ptr %switch.gep, align 8
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ret ptr %switch.load
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}
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