derek.holloway
7502bf64a4
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77 lines
2.3 KiB
LLVM
77 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt < %s -passes=simplifycfg -S | FileCheck %s
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define i32 @nodedup(i1 %c, i16 %v) {
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; CHECK-LABEL: define i32 @nodedup(
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; CHECK-SAME: i1 [[C:%.*]], i16 [[V:%.*]]) {
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; CHECK-NEXT: br i1 [[C]], label %[[B1:.*]], label %[[B2:.*]]
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; CHECK: [[B1]]:
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; CHECK-NEXT: switch i16 [[V]], label %[[RET2:.*]] [
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; CHECK-NEXT: i16 1962, label %[[COMMON_RET:.*]]
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; CHECK-NEXT: i16 2000, label %[[COMMON_RET]]
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; CHECK-NEXT: i16 1963, label %[[COMMON_RET]]
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; CHECK-NEXT: ]
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; CHECK: [[B2]]:
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; CHECK-NEXT: switch i16 [[V]], label %[[RET2]] [
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; CHECK-NEXT: i16 2766, label %[[COMMON_RET]]
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; CHECK-NEXT: i16 2798, label %[[COMMON_RET]]
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; CHECK-NEXT: i16 2767, label %[[COMMON_RET]]
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; CHECK-NEXT: ]
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; CHECK: [[COMMON_RET]]:
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; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 3, %[[RET2]] ], [ 1, %[[B2]] ], [ 1, %[[B2]] ], [ 1, %[[B2]] ], [ 1, %[[B1]] ], [ 1, %[[B1]] ], [ 1, %[[B1]] ]
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; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
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; CHECK: [[RET2]]:
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; CHECK-NEXT: br label %[[COMMON_RET]]
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;
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br i1 %c, label %b1, label %b2
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b1:
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switch i16 %v, label %ret2 [
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i16 1962, label %ret1
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i16 2000, label %ret1
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i16 1963, label %ret1
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]
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b2:
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switch i16 %v, label %ret2 [
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i16 2766, label %ret1
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i16 2798, label %ret1
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i16 2767, label %ret1
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]
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ret1:
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ret i32 1
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ret2:
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ret i32 3
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}
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define i32 @dedup(i1 %c, i16 %v) {
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; CHECK-LABEL: define i32 @dedup(
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; CHECK-SAME: i1 [[C:%.*]], i16 [[V:%.*]]) {
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; CHECK-NEXT: switch i16 [[V]], label %[[RET2:.*]] [
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; CHECK-NEXT: i16 2766, label %[[COMMON_RET:.*]]
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; CHECK-NEXT: i16 2798, label %[[COMMON_RET]]
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; CHECK-NEXT: i16 2767, label %[[COMMON_RET]]
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; CHECK-NEXT: ]
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; CHECK: [[COMMON_RET]]:
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; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 3, %[[RET2]] ], [ 1, [[TMP0:%.*]] ], [ 1, [[TMP0]] ], [ 1, [[TMP0]] ]
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; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
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; CHECK: [[RET2]]:
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; CHECK-NEXT: br label %[[COMMON_RET]]
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;
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br i1 %c, label %b1, label %b2
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b1:
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switch i16 %v, label %ret2 [
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i16 2766, label %ret1
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i16 2798, label %ret1
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i16 2767, label %ret1
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]
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b2:
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switch i16 %v, label %ret2 [
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i16 2766, label %ret1
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i16 2798, label %ret1
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i16 2767, label %ret1
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]
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ret1:
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ret i32 1
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ret2:
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ret i32 3
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}
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