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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

59 lines
4.0 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=vector-combine -S %s | FileCheck %s
define <8 x i32> @PR197910(<8 x i32> %arg) {
; CHECK-LABEL: define <8 x i32> @PR197910(
; CHECK-SAME: <8 x i32> [[ARG:%.*]]) {
; CHECK-NEXT: [[PA:%.*]] = freeze <8 x i32> [[ARG]]
; CHECK-NEXT: [[A:%.*]] = add <8 x i32> [[PA]], [[PA]]
; CHECK-NEXT: [[B:%.*]] = or <8 x i32> [[PA]], [[PA]]
; CHECK-NEXT: [[S2:%.*]] = shufflevector <8 x i32> [[B]], <8 x i32> [[A]], <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 12, i32 13, i32 6, i32 7>
; CHECK-NEXT: [[S3:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> [[B]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
; CHECK-NEXT: [[S4:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> [[B]], <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
; CHECK-NEXT: [[S5:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> [[B]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT: [[S6:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: [[S7:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> [[B]], <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 13, i32 14, i32 7>
; CHECK-NEXT: [[S8:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> [[B]], <8 x i32> <i32 8, i32 1, i32 2, i32 11, i32 12, i32 5, i32 6, i32 15>
; CHECK-NEXT: [[U1:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> poison, <8 x i32> zeroinitializer
; CHECK-NEXT: [[U6:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> poison, <8 x i32> zeroinitializer
; CHECK-NEXT: [[R12:%.*]] = add <8 x i32> [[S2]], [[S3]]
; CHECK-NEXT: [[R34:%.*]] = add <8 x i32> [[S4]], [[S5]]
; CHECK-NEXT: [[R56:%.*]] = add <8 x i32> [[S6]], [[S7]]
; CHECK-NEXT: [[R1234:%.*]] = add <8 x i32> [[R12]], [[R34]]
; CHECK-NEXT: [[R123456:%.*]] = add <8 x i32> [[R1234]], [[R56]]
; CHECK-NEXT: [[R1234567:%.*]] = add <8 x i32> [[R123456]], [[S8]]
; CHECK-NEXT: [[RU:%.*]] = add <8 x i32> [[U1]], [[U6]]
; CHECK-NEXT: [[RET:%.*]] = add <8 x i32> [[R1234567]], [[RU]]
; CHECK-NEXT: ret <8 x i32> [[RET]]
;
%pa = freeze <8 x i32> %arg
%a = add <8 x i32> %pa, %pa
%b = or <8 x i32> %pa, %pa
%s2 = shufflevector <8 x i32> %b, <8 x i32> %a, <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 12, i32 13, i32 6, i32 7>
%s3 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
%s4 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
%s5 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
%s6 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
%s7 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 13, i32 14, i32 7>
%s8 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 2, i32 11, i32 12, i32 5, i32 6, i32 15>
%s1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 11, i32 4, i32 5, i32 14, i32 15>
%u1 = shufflevector <8 x i32> %s1, <8 x i32> poison, <8 x i32> zeroinitializer
%u2 = shufflevector <8 x i32> %s1, <8 x i32> poison, <8 x i32> zeroinitializer
%u3 = shufflevector <8 x i32> %s1, <8 x i32> poison, <8 x i32> zeroinitializer
%u4 = shufflevector <8 x i32> %s1, <8 x i32> poison, <8 x i32> zeroinitializer
%u5 = shufflevector <8 x i32> %s1, <8 x i32> poison, <8 x i32> zeroinitializer
%u6 = shufflevector <8 x i32> %s1, <8 x i32> poison, <8 x i32> zeroinitializer
%r12 = add <8 x i32> %s2, %s3
%r34 = add <8 x i32> %s4, %s5
%r56 = add <8 x i32> %s6, %s7
%r1234 = add <8 x i32> %r12, %r34
%r123456 = add <8 x i32> %r1234, %r56
%r1234567 = add <8 x i32> %r123456, %s8
%ru = add <8 x i32> %u1, %u6
%ret = add <8 x i32> %r1234567, %ru
ret <8 x i32> %ret
}