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64 lines
2.0 KiB
C++
64 lines
2.0 KiB
C++
//===- llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp -----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUTargetMachine.h"
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#include "AMDGPUUnitTests.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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TEST_F(AMDGPUTestBase, ExecMayBeModifiedBeforeAnyUse) {
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auto TM = createAMDGPUTargetMachine("amdgcn-amd-", "gfx906", "");
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if (!TM)
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GTEST_SKIP();
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GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
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std::string(TM->getTargetFeatureString()), *TM);
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LLVMContext Ctx;
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Module Mod("Module", Ctx);
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Mod.setDataLayout(TM->createDataLayout());
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auto *Type = FunctionType::get(Type::getVoidTy(Ctx), false);
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auto *F = Function::Create(Type, GlobalValue::ExternalLinkage, "Test", &Mod);
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MachineModuleInfo MMI(TM.get());
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auto MF =
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std::make_unique<MachineFunction>(*F, *TM, ST, MMI.getContext(), 42);
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auto *BB = MF->CreateMachineBasicBlock();
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MF->push_back(BB);
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auto E = BB->end();
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DebugLoc DL;
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const auto &TII = *ST.getInstrInfo();
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auto &MRI = MF->getRegInfo();
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// create machine IR
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Register R = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
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MachineInstr *DefMI =
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BuildMI(*BB, E, DL, TII.get(AMDGPU::S_MOV_B32), R).addImm(42).getInstr();
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auto First =
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BuildMI(*BB, E, DL, TII.get(AMDGPU::S_NOP)).addReg(R, RegState::Implicit);
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BuildMI(*BB, E, DL, TII.get(AMDGPU::S_NOP)).addReg(R, RegState::Implicit);
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// this violates the continuous sequence of R's uses for the first S_NOP
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First.addReg(R, RegState::Implicit);
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#ifdef DEBUG_THIS_TEST
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MF->dump();
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MRI.dumpUses(R);
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#endif
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// make sure execMayBeModifiedBeforeAnyUse doesn't crash
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ASSERT_FALSE(execMayBeModifiedBeforeAnyUse(MRI, R, *DefMI));
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}
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