derek.holloway
7502bf64a4
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75 lines
2.7 KiB
MLIR
75 lines
2.7 KiB
MLIR
// RUN: mlir-opt -verify-diagnostics -split-input-file %s | mlir-opt | FileCheck %s
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// CHECK-LABEL: arm_neon_smull
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func.func @arm_neon_smull(%a: vector<8xi8>, %b: vector<8xi8>)
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-> (vector<8xi16>, vector<4xi32>, vector<2xi64>) {
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// CHECK: arm_neon.intr.smull {{.*}}: vector<8xi8> to vector<8xi16>
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%0 = arm_neon.intr.smull %a, %b : vector<8xi8> to vector<8xi16>
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%00 = vector.extract_strided_slice %0 {offsets = [3], sizes = [4], strides = [1]}:
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vector<8xi16> to vector<4xi16>
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// CHECK: arm_neon.intr.smull {{.*}}: vector<4xi16> to vector<4xi32>
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%1 = arm_neon.intr.smull %00, %00 : vector<4xi16> to vector<4xi32>
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%11 = vector.extract_strided_slice %1 {offsets = [1], sizes = [2], strides = [1]}:
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vector<4xi32> to vector<2xi32>
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// CHECK: arm_neon.intr.smull {{.*}}: vector<2xi32> to vector<2xi64>
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%2 = arm_neon.intr.smull %11, %11 : vector<2xi32> to vector<2xi64>
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return %0, %1, %2 : vector<8xi16>, vector<4xi32>, vector<2xi64>
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}
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// -----
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// CHECK-LABEL: arm_neon_sdot
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func.func @arm_neon_sdot(%a: vector<2xi32>, %b: vector<8xi8>, %c: vector<8xi8>) -> vector<2xi32> {
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// CHECK: arm_neon.intr.sdot {{.*}}: vector<8xi8>, vector<8xi8> to vector<2xi32>
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%0 = arm_neon.intr.sdot %a, %b, %c : vector<8xi8>, vector<8xi8> to vector<2xi32>
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return %0 : vector<2xi32>
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}
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// -----
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// CHECK-LABEL: arm_neon_smmla
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func.func @arm_neon_smmla(%a: vector<16xi8>,
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%b: vector<16xi8>,
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%c: vector<4xi32>) -> vector<4xi32> {
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// CHECK: arm_neon.intr.smmla {{.*}}: vector<16xi8> to vector<4xi32>
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%0 = arm_neon.intr.smmla %c, %a, %b : vector<16xi8> to vector<4xi32>
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return %0 : vector<4xi32>
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}
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// -----
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// CHECK-LABEL: arm_neon_ummla
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func.func @arm_neon_ummla(%a: vector<16xi8>,
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%b: vector<16xi8>,
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%c: vector<4xi32>) -> vector<4xi32> {
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// CHECK: arm_neon.intr.ummla {{.*}}: vector<16xi8> to vector<4xi32>
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%0 = arm_neon.intr.ummla %c, %a, %b : vector<16xi8> to vector<4xi32>
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return %0 : vector<4xi32>
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}
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// -----
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// CHECK-LABEL: arm_neon_usmmla
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func.func @arm_neon_usmmla(%a: vector<16xi8>,
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%b: vector<16xi8>,
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%c: vector<4xi32>) -> vector<4xi32> {
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// CHECK: arm_neon.intr.usmmla {{.*}}: vector<16xi8> to vector<4xi32>
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%0 = arm_neon.intr.usmmla %c, %a, %b : vector<16xi8> to vector<4xi32>
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return %0 : vector<4xi32>
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}
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// -----
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// CHECK-LABEL: arm_neon_bfmmla
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func.func @arm_neon_bfmmla(%a: vector<8xbf16>,
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%b: vector<8xbf16>,
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%c: vector<4xf32>) -> vector<4xf32> {
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// CHECK: arm_neon.intr.bfmmla {{.*}}: vector<8xbf16> to vector<4xf32>
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%0 = arm_neon.intr.bfmmla %c, %a, %b : vector<8xbf16> to vector<4xf32>
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return %0 : vector<4xf32>
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}
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