derek.holloway
7502bf64a4
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42 lines
1.4 KiB
MLIR
42 lines
1.4 KiB
MLIR
// RUN: mlir-opt -int-range-optimizations %s | FileCheck %s
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gpu.module @module{
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gpu.func @kernel_1() kernel {
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%tidx = nvvm.read.ptx.sreg.tid.x range <i32, 0, 32> : i32
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%tidy = nvvm.read.ptx.sreg.tid.y range <i32, 0, 128> : i32
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%tidz = nvvm.read.ptx.sreg.tid.z range <i32, 0, 4> : i32
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%cidx = nvvm.read.ptx.sreg.cluster.ctaid.x : i32 // unspecified range
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%cond = ub.poison : i1
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%c64 = arith.constant 64 : i32
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%1 = arith.cmpi sgt, %tidx, %c64 : i32
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scf.if %1 {
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gpu.printf "threadidx"
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}
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%2 = arith.cmpi sgt, %tidy, %c64 : i32
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scf.if %2 {
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gpu.printf "threadidy"
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}
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%3 = arith.cmpi sgt, %tidz, %c64 : i32
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scf.if %3 {
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gpu.printf "threadidz"
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}
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%4 = arith.select %cond, %cidx, %c64 : i32
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gpu.printf "ctaidx", %4 : i32
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gpu.return
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}
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}
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// CHECK-LABEL: gpu.func @kernel_1
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// CHECK: %[[false:.+]] = arith.constant false
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// CHECK: %[[c64_i32:.+]] = arith.constant 64 : i32
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// CHECK: %[[S0:.+]] = nvvm.read.ptx.sreg.tid.y range <i32, 0, 128> : i32
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// CHECK: scf.if %[[false]] {
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// CHECK: gpu.printf "threadidx"
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// CHECK: %[[S1:.+]] = arith.cmpi sgt, %[[S0]], %[[c64_i32]] : i32
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// CHECK: scf.if %[[S1]] {
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// CHECK: gpu.printf "threadidy"
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// CHECK: scf.if %[[false]] {
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// CHECK: gpu.printf "threadidz"
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// CHECK: arith.select
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