derek.holloway
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831 lines
29 KiB
C++
831 lines
29 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of libcu++, the C++ Standard Library for your entire system,
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// under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES.
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//
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//===----------------------------------------------------------------------===//
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// MIT License
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//
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// Modifications Copyright (C) 2025 Advanced Micro Devices, Inc. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all
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// copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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// SOFTWARE.
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#ifndef _LIBCUDACXX___FLOATING_POINT_CAST_H
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#define _LIBCUDACXX___FLOATING_POINT_CAST_H
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#include <cuda/std/detail/__config>
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#if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC)
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# pragma GCC system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG)
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# pragma clang system_header
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#elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC)
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# pragma system_header
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#endif // no system header
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#include <cuda/std/__floating_point/nvfp_types.h>
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#include <cuda/std/__floating_point/storage.h>
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#include <cuda/std/__type_traits/always_false.h>
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#include <cuda/std/__type_traits/is_same.h>
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_LIBCUDACXX_BEGIN_NAMESPACE_STD
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template <class _To, class _From>
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_CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI _To __fp_cast(_From __v) noexcept
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{
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if constexpr (_CCCL_TRAIT(is_same, _From, float))
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{
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if constexpr (_CCCL_TRAIT(is_same, _To, float))
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{
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return __v;
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}
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else if constexpr (_CCCL_TRAIT(is_same, _To, double))
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{
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return static_cast<double>(__v);
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}
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#if _CCCL_HAS_LONG_DOUBLE()
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else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
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{
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return static_cast<long double>(__v);
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}
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#endif // _CCCL_HAS_LONG_DOUBLE()
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#if _CCCL_HAS_NVFP16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
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{
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return ::__float2half(__v);
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}
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#endif // _CCCL_HAS_NVFP16()
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#if _CCCL_HAS_NVBF16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
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{
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return ::__float2bfloat16(__v);
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}
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#endif // _CCCL_HAS_NVBF16()
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#if _CCCL_HAS_NVFP8_E4M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e4m3>(::__nv_cvt_float_to_fp8(__v, __NV_NOSAT, __NV_E4M3));
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}
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#endif // _CCCL_HAS_NVFP8_E4M3()
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#if _CCCL_HAS_NVFP8_E5M2()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e5m2>(::__nv_cvt_float_to_fp8(__v, __NV_NOSAT, __NV_E5M2));
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}
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#endif // _CCCL_HAS_NVFP8_E5M2()
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#if _CCCL_HAS_NVFP8_E8M0()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e8m0>(::__nv_cvt_float_to_e8m0(__v, __NV_NOSAT, cudaRoundZero));
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}
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#endif // _CCCL_HAS_NVFP8_E8M0()
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#if _CCCL_HAS_NVFP6_E2M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e2m3>(::__nv_cvt_float_to_fp6(__v, __NV_E2M3, cudaRoundNearest));
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}
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#endif // _CCCL_HAS_NVFP6_E2M3()
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#if _CCCL_HAS_NVFP6_E3M2()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e3m2>(::__nv_cvt_float_to_fp6(__v, __NV_E3M2, cudaRoundNearest));
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}
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#endif // _CCCL_HAS_NVFP6_E3M2()
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#if _CCCL_HAS_NVFP4_E2M1()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp4_e2m1>(::__nv_cvt_float_to_fp4(__v, __NV_E2M1, cudaRoundNearest));
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}
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#endif // _CCCL_HAS_NVFP4_E2M1()
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else
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{
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static_assert(__always_false_v<_To>, "Unsupported floating point format");
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}
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}
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else if constexpr (_CCCL_TRAIT(is_same, _From, double))
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{
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if constexpr (_CCCL_TRAIT(is_same, _To, float))
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{
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return static_cast<float>(__v);
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}
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else if constexpr (_CCCL_TRAIT(is_same, _To, double))
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{
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return __v;
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}
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#if _CCCL_HAS_LONG_DOUBLE()
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else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
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{
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return static_cast<long double>(__v);
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}
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#endif // _CCCL_HAS_LONG_DOUBLE()
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#if _CCCL_HAS_NVFP16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
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{
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// NOTE(HIP/AMD): fp16 currently does not provide a __double2half conversion
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// (see https://github.com/ROCm/clr/blob/amd-staging/hipamd/include/hip/amd_detail/amd_hip_fp16.h)
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// corresponding ticket SWDEV-529927
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return __float2half(static_cast<float>(__v));
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}
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#endif // _CCCL_HAS_NVFP16()
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#if _CCCL_HAS_NVBF16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
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{
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return ::__double2bfloat16(__v);
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}
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#endif // _CCCL_HAS_NVBF16()
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#if _CCCL_HAS_NVFP8_E4M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e4m3>(::__nv_cvt_double_to_fp8(__v, __NV_NOSAT, __NV_E4M3));
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}
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#endif // _CCCL_HAS_NVFP8_E4M3()
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#if _CCCL_HAS_NVFP8_E5M2()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e5m2>(::__nv_cvt_double_to_fp8(__v, __NV_NOSAT, __NV_E5M2));
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}
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#endif // _CCCL_HAS_NVFP8_E5M2()
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#if _CCCL_HAS_NVFP8_E8M0()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e8m0>(::__nv_cvt_double_to_e8m0(__v, __NV_NOSAT, cudaRoundZero));
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}
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#endif // _CCCL_HAS_NVFP8_E8M0()
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#if _CCCL_HAS_NVFP6_E2M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e2m3>(::__nv_cvt_double_to_fp6(__v, __NV_E2M3, cudaRoundNearest));
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}
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#endif // _CCCL_HAS_NVFP6_E2M3()
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#if _CCCL_HAS_NVFP6_E3M2()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e3m2>(::__nv_cvt_double_to_fp6(__v, __NV_E3M2, cudaRoundNearest));
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}
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#endif // _CCCL_HAS_NVFP6_E3M2()
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#if _CCCL_HAS_NVFP4_E2M1()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
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{
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return _CUDA_VSTD::__fp_from_storage<__nv_fp4_e2m1>(::__nv_cvt_double_to_fp4(__v, __NV_E2M1, cudaRoundNearest));
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}
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#endif // _CCCL_HAS_NVFP4_E2M1()
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else
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{
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static_assert(__always_false_v<_To>, "Unsupported floating point format");
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}
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}
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#if _CCCL_HAS_LONG_DOUBLE()
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else if constexpr (_CCCL_TRAIT(is_same, _From, long double))
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{
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if constexpr (_CCCL_TRAIT(is_same, _To, float))
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{
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return static_cast<float>(__v);
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}
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else if constexpr (_CCCL_TRAIT(is_same, _To, double))
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{
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return static_cast<double>(__v);
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}
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else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
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{
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return __v;
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}
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# if _CCCL_HAS_NVFP16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
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{
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return _CUDA_VSTD::__fp_cast<__half>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP16()
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# if _CCCL_HAS_NVBF16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
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{
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return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVBF16()
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# if _CCCL_HAS_NVFP8_E4M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
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{
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return _CUDA_VSTD::__fp_cast<__nv_fp8_e4m3>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP8_E4M3()
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# if _CCCL_HAS_NVFP8_E5M2()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
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{
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return _CUDA_VSTD::__fp_cast<__nv_fp8_e5m2>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP8_E5M2()
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# if _CCCL_HAS_NVFP8_E8M0()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
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{
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return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP8_E8M0()
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# if _CCCL_HAS_NVFP6_E2M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
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{
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return _CUDA_VSTD::__fp_cast<__nv_fp6_e2m3>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP6_E2M3()
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# if _CCCL_HAS_NVFP6_E3M2()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
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{
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return _CUDA_VSTD::__fp_cast<__nv_fp6_e3m2>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP6_E3M2()
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# if _CCCL_HAS_NVFP4_E2M1()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
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{
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return _CUDA_VSTD::__fp_cast<__nv_fp4_e2m1>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP4_E2M1()
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else
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{
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static_assert(__always_false_v<_To>, "Unsupported floating point format");
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}
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}
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#endif // _CCCL_HAS_LONG_DOUBLE()
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#if _CCCL_HAS_NVFP16()
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else if constexpr (_CCCL_TRAIT(is_same, _From, __half))
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{
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if constexpr (_CCCL_TRAIT(is_same, _To, float))
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{
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return ::__half2float(__v);
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}
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else if constexpr (_CCCL_TRAIT(is_same, _To, double))
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{
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return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
|
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# if _CCCL_HAS_LONG_DOUBLE()
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else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
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{
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return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_LONG_DOUBLE()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
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{
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return __v;
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}
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# if _CCCL_HAS_NVBF16()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
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{
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return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
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}
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# endif // _CCCL_HAS_NVFP16()
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# if _CCCL_HAS_NVFP8_E4M3()
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
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|
return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e4m3>(::__nv_cvt_halfraw_to_fp8(__v, __NV_NOSAT, __NV_E4M3));
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}
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# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
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else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
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|
return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e5m2>(::__nv_cvt_halfraw_to_fp8(__v, __NV_NOSAT, __NV_E5M2));
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|
}
|
|
# endif // _CCCL_HAS_NVFP8_E5M2()
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e2m3>(::__nv_cvt_halfraw_to_fp6(__v, __NV_E2M3, cudaRoundNearest));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e3m2>(::__nv_cvt_halfraw_to_fp6(__v, __NV_E3M2, cudaRoundNearest));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp4_e2m1>(::__nv_cvt_halfraw_to_fp4(__v, __NV_E2M1, cudaRoundNearest));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP16()
|
|
#if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __hip_bfloat16))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return ::__bfloat162float(__v);
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__half>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return __v;
|
|
}
|
|
# if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e4m3>(::__nv_cvt_bfloat16raw_to_fp8(__v, __NV_NOSAT, __NV_E4M3));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e5m2>(::__nv_cvt_bfloat16raw_to_fp8(__v, __NV_NOSAT, __NV_E5M2));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E5M2()
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp8_e8m0>(
|
|
::__nv_cvt_bfloat16raw_to_e8m0(__v, __NV_NOSAT, cudaRoundZero));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e2m3>(
|
|
::__nv_cvt_bfloat16raw_to_fp6(__v, __NV_E2M3, cudaRoundNearest));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp6_e3m2>(
|
|
::__nv_cvt_bfloat16raw_to_fp6(__v, __NV_E3M2, cudaRoundNearest));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_from_storage<__nv_fp4_e2m1>(
|
|
::__nv_cvt_bfloat16raw_to_fp4(__v, __NV_E2M1, cudaRoundNearest));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVBF16()
|
|
#if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __nv_fp8_e4m3))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<float>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return ::__nv_cvt_fp8_to_halfraw(__v.__x, __NV_E4M3);
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
# if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return __v;
|
|
}
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e5m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e2m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e3m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp4_e2m1>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP8_E4M3()
|
|
#if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __nv_fp8_e5m2))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<float>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return ::__nv_cvt_fp8_to_halfraw(__v.__x, __NV_E5M2);
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
# if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVBF16()
|
|
# if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e4m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return __v;
|
|
}
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e2m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e3m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp4_e2m1>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP8_E5M2()
|
|
#if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __nv_fp8_e8m0))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<float>(_CUDA_VSTD::__fp_cast<__hip_bfloat16>(__v));
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<__hip_bfloat16>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<__hip_bfloat16>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__half>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
# if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return ::__nv_cvt_e8m0_to_bf16raw(__v.__x);
|
|
}
|
|
# endif // _CCCL_HAS_NVBF16()
|
|
# if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e4m3>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e5m2>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return __v;
|
|
}
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e2m3>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e3m2>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp4_e2m1>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP8_E8M0()
|
|
#if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __nv_fp6_e2m3))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<float>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return ::__nv_cvt_fp6_to_halfraw(__v.__x, __NV_E2M3);
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
# if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVBF16()
|
|
# if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e4m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e5m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E5M2()
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return __v;
|
|
}
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e3m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp4_e2m1>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP6_E2M3()
|
|
#if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __nv_fp6_e3m2))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<float>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return ::__nv_cvt_fp6_to_halfraw(__v.__x, __NV_E3M2);
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
# if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVBF16()
|
|
# if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e4m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e5m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E5M2()
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e2m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return __v;
|
|
}
|
|
# if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp4_e2m1>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP6_E3M2()
|
|
#if _CCCL_HAS_NVFP4_E2M1()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _From, __nv_fp4_e2m1))
|
|
{
|
|
if constexpr (_CCCL_TRAIT(is_same, _To, float))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<float>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# if _CCCL_HAS_LONG_DOUBLE()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, long double))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<long double>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_LONG_DOUBLE()
|
|
# if _CCCL_HAS_NVFP16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __half))
|
|
{
|
|
return ::__nv_cvt_fp4_to_halfraw(__v.__x, __NV_E2M1);
|
|
}
|
|
# endif // _CCCL_HAS_NVFP16()
|
|
# if _CCCL_HAS_NVBF16()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __hip_bfloat16))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__hip_bfloat16>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVBF16()
|
|
# if _CCCL_HAS_NVFP8_E4M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e4m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e4m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E4M3()
|
|
# if _CCCL_HAS_NVFP8_E5M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e5m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e5m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E5M2()
|
|
# if _CCCL_HAS_NVFP8_E8M0()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp8_e8m0))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp8_e8m0>(_CUDA_VSTD::__fp_cast<float>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP8_E8M0()
|
|
# if _CCCL_HAS_NVFP6_E2M3()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e2m3))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e2m3>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E2M3()
|
|
# if _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp6_e3m2))
|
|
{
|
|
return _CUDA_VSTD::__fp_cast<__nv_fp6_e3m2>(_CUDA_VSTD::__fp_cast<__half>(__v));
|
|
}
|
|
# endif // _CCCL_HAS_NVFP6_E3M2()
|
|
else if constexpr (_CCCL_TRAIT(is_same, _To, __nv_fp4_e2m1))
|
|
{
|
|
return __v;
|
|
}
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_To>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
#endif // _CCCL_HAS_NVFP4_E2M1()
|
|
else
|
|
{
|
|
static_assert(__always_false_v<_From>, "Unsupported floating point format");
|
|
}
|
|
}
|
|
|
|
_LIBCUDACXX_END_NAMESPACE_STD
|
|
|
|
#endif // _LIBCUDACXX___FLOATING_POINT_CAST_H
|