derek.holloway
7502bf64a4
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595 lines
26 KiB
C++
595 lines
26 KiB
C++
// Copyright © Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#pragma once
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#include <hipdnn-gpu-ref/ShallowGpuTensor.hpp>
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#include <hipdnn-gpu-ref/detail/GpuRefKernelCompiler.hpp>
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#include <hipdnn-gpu-ref/detail/HipRtcTypeName.hpp>
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#include <hipdnn_data_sdk/utilities/Tensor.hpp>
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#include <hipdnn_test_sdk/utilities/ConvolutionValidation.hpp>
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#include <cstdint>
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#include <stdexcept>
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#include <string>
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#include <vector>
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namespace hipdnn_gpu_ref
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{
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namespace detail
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{
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template <typename XDataType, typename WDataType, typename YDataType, typename ComputeDataType>
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inline std::vector<std::string> buildConvDefines(bool useTf32 = false)
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{
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std::vector<std::string> defines;
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defines.emplace_back(std::string("-DX_TYPE=") + HipRtcTypeName<XDataType>::VALUE);
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defines.emplace_back(std::string("-DW_TYPE=") + HipRtcTypeName<WDataType>::VALUE);
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defines.emplace_back(std::string("-DY_TYPE=") + HipRtcTypeName<YDataType>::VALUE);
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defines.emplace_back(std::string("-DCOMPUTE_TYPE=") + HipRtcTypeName<ComputeDataType>::VALUE);
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if(useTf32)
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{
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defines.emplace_back("-DUSE_TF32");
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}
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return defines;
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}
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} // namespace detail
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class GpuFpReferenceConvolution
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{
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public:
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// --- Forward convolution (fprop) ---
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// TensorBase overload — symmetric padding convenience wrapper.
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template <class XDataType,
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class WDataType = XDataType,
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class YDataType = XDataType,
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class ComputeDataType = double>
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static void fprop(hipdnn_data_sdk::utilities::TensorBase<XDataType>& x,
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hipdnn_data_sdk::utilities::TensorBase<WDataType>& w,
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hipdnn_data_sdk::utilities::TensorBase<YDataType>& y,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& padding,
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double alpha = 1.0,
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double beta = 0.0,
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bool useTf32 = false)
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{
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fprop<XDataType, WDataType, YDataType, ComputeDataType>(
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x, w, y, convStrides, dilations, padding, padding, alpha, beta, useTf32);
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}
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// TensorBase overload — asymmetric padding.
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// Takes non-const references because deviceData() may trigger host→device sync.
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template <class XDataType,
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class WDataType = XDataType,
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class YDataType = XDataType,
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class ComputeDataType = double>
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static void fprop(hipdnn_data_sdk::utilities::TensorBase<XDataType>& x,
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hipdnn_data_sdk::utilities::TensorBase<WDataType>& w,
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hipdnn_data_sdk::utilities::TensorBase<YDataType>& y,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& prePadding,
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const std::vector<int64_t>& postPadding,
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double alpha = 1.0,
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double beta = 0.0,
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bool useTf32 = false)
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{
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fprop<XDataType, WDataType, YDataType, ComputeDataType>(x.memory().deviceData(),
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w.memory().deviceData(),
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y.memory().deviceData(),
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x.dims(),
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w.dims(),
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y.dims(),
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x.strides(),
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w.strides(),
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y.strides(),
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convStrides,
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dilations,
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prePadding,
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postPadding,
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alpha,
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beta,
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useTf32);
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y.memory().markDeviceModified();
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}
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// --- Backward data gradient (dgrad) ---
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// gradX and w are non-const because MigratableMemory::deviceData() triggers
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// lazy host-to-device synchronization, which mutates internal state.
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// Overload for uniform padding
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template <class DxDataType,
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class WDataType = DxDataType,
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class DyDataType = DxDataType,
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class ComputeDataType = double>
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static void dgrad(hipdnn_data_sdk::utilities::TensorBase<DxDataType>& gradX,
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hipdnn_data_sdk::utilities::TensorBase<WDataType>& w,
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hipdnn_data_sdk::utilities::TensorBase<DyDataType>& gradY,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& padding,
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double alpha = 1.0,
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double beta = 0.0)
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{
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dgrad<DxDataType, WDataType, DyDataType, ComputeDataType>(
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gradX, w, gradY, convStrides, dilations, padding, padding, alpha, beta);
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}
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template <class DxDataType,
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class WDataType = DxDataType,
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class DyDataType = DxDataType,
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class ComputeDataType = double>
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static void dgrad(hipdnn_data_sdk::utilities::TensorBase<DxDataType>& gradX,
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hipdnn_data_sdk::utilities::TensorBase<WDataType>& w,
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hipdnn_data_sdk::utilities::TensorBase<DyDataType>& gradY,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& prePadding,
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const std::vector<int64_t>& postPadding,
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double alpha = 1.0,
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double beta = 0.0)
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{
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validateInput(
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gradX.dims(), w.dims(), gradY.dims(), convStrides, dilations, prePadding, postPadding);
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const auto nDims = gradX.dims().size();
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auto defines
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= detail::buildConvDefines<DxDataType, WDataType, DyDataType, ComputeDataType>();
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auto* dxPtr = gradX.memory().deviceData();
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auto* wPtr = w.memory().deviceData();
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auto* dyPtr = gradY.memory().deviceData();
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// Only prePadding is passed to the kernel. Post-padding is implicitly
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// handled by the output tensor dimensions and the kernel's bounds checks.
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if(nDims == 3)
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{
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launchDgrad1d(dxPtr,
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wPtr,
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dyPtr,
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gradX.dims(),
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w.dims(),
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gradY.dims(),
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gradX.strides(),
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w.strides(),
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gradY.strides(),
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else if(nDims == 4)
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{
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launchDgrad2d(dxPtr,
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wPtr,
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dyPtr,
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gradX.dims(),
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w.dims(),
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gradY.dims(),
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gradX.strides(),
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w.strides(),
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gradY.strides(),
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else if(nDims == 5)
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{
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launchDgrad3d(dxPtr,
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wPtr,
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dyPtr,
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gradX.dims(),
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w.dims(),
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gradY.dims(),
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gradX.strides(),
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w.strides(),
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gradY.strides(),
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else
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{
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throw std::invalid_argument(
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"GPU kernels support 1D/2D/3D convolutions (tensor rank 3/4/5), got rank "
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+ std::to_string(nDims));
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}
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gradX.memory().markDeviceModified();
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}
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// --- Backward weight gradient (wgrad) ---
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// x and gradY are non-const because MigratableMemory::deviceData() triggers
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// lazy host-to-device synchronization, which mutates internal state.
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// Overload for uniform padding
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template <class XDataType,
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class DwDataType = XDataType,
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class DyDataType = XDataType,
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class ComputeDataType = double>
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static void wgrad(hipdnn_data_sdk::utilities::TensorBase<XDataType>& x,
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hipdnn_data_sdk::utilities::TensorBase<DwDataType>& gradW,
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hipdnn_data_sdk::utilities::TensorBase<DyDataType>& gradY,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& padding,
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double alpha = 1.0,
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double beta = 0.0)
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{
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wgrad<XDataType, DwDataType, DyDataType, ComputeDataType>(
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x, gradW, gradY, convStrides, dilations, padding, padding, alpha, beta);
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}
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template <class XDataType,
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class DwDataType = XDataType,
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class DyDataType = XDataType,
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class ComputeDataType = double>
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static void wgrad(hipdnn_data_sdk::utilities::TensorBase<XDataType>& x,
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hipdnn_data_sdk::utilities::TensorBase<DwDataType>& gradW,
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hipdnn_data_sdk::utilities::TensorBase<DyDataType>& gradY,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& prePadding,
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const std::vector<int64_t>& postPadding,
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double alpha = 1.0,
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double beta = 0.0)
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{
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validateInput(
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x.dims(), gradW.dims(), gradY.dims(), convStrides, dilations, prePadding, postPadding);
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const auto nDims = x.dims().size();
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auto defines
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= detail::buildConvDefines<XDataType, DwDataType, DyDataType, ComputeDataType>();
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auto* xPtr = x.memory().deviceData();
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auto* dwPtr = gradW.memory().deviceData();
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auto* dyPtr = gradY.memory().deviceData();
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// Only prePadding is passed to the kernel. Post-padding is implicitly
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// handled by the output tensor dimensions and the kernel's bounds checks.
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if(nDims == 3)
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{
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launchWgrad1d(xPtr,
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dwPtr,
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dyPtr,
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x.dims(),
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gradW.dims(),
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gradY.dims(),
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x.strides(),
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gradW.strides(),
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gradY.strides(),
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else if(nDims == 4)
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{
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launchWgrad2d(xPtr,
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dwPtr,
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dyPtr,
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x.dims(),
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gradW.dims(),
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gradY.dims(),
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x.strides(),
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gradW.strides(),
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gradY.strides(),
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else if(nDims == 5)
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{
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launchWgrad3d(xPtr,
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dwPtr,
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dyPtr,
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x.dims(),
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gradW.dims(),
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gradY.dims(),
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x.strides(),
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gradW.strides(),
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gradY.strides(),
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else
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{
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throw std::invalid_argument(
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"GPU kernels support 1D/2D/3D convolutions (tensor rank 3/4/5), got rank "
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+ std::to_string(nDims));
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}
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gradW.memory().markDeviceModified();
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}
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private:
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// --- Raw device-pointer fprop (implementation detail) ---
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template <class XDataType,
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class WDataType = XDataType,
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class YDataType = XDataType,
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class ComputeDataType = double>
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static void fprop(const void* xPtr,
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const void* wPtr,
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void* yPtr,
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const std::vector<int64_t>& xDims,
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const std::vector<int64_t>& wDims,
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const std::vector<int64_t>& yDims,
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const std::vector<int64_t>& xStrides,
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const std::vector<int64_t>& wStrides,
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const std::vector<int64_t>& yStrides,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& prePadding,
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const std::vector<int64_t>& postPadding,
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double alpha = 1.0,
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double beta = 0.0,
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bool useTf32 = false)
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{
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validateInput(xDims, wDims, yDims, convStrides, dilations, prePadding, postPadding);
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const auto nDims = xDims.size();
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auto defines
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= detail::buildConvDefines<XDataType, WDataType, YDataType, ComputeDataType>(useTf32);
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// Only prePadding is passed to the kernel. Post-padding is implicitly
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// handled by the output tensor dimensions and the kernel's bounds checks.
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if(nDims == 3)
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{
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launchFprop1d(xPtr,
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wPtr,
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yPtr,
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xDims,
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wDims,
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yDims,
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xStrides,
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wStrides,
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yStrides,
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else if(nDims == 4)
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{
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launchFprop2d(xPtr,
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wPtr,
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yPtr,
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xDims,
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wDims,
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yDims,
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xStrides,
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wStrides,
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yStrides,
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else if(nDims == 5)
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{
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launchFprop3d(xPtr,
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wPtr,
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yPtr,
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xDims,
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wDims,
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yDims,
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xStrides,
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wStrides,
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yStrides,
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convStrides,
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dilations,
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prePadding,
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defines,
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alpha,
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beta);
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}
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else
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{
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throw std::invalid_argument(
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"GPU kernels support 1D/2D/3D convolutions (tensor rank 3/4/5), got rank "
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+ std::to_string(nDims));
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}
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}
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// --- Validation ---
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static void validateInput(const std::vector<int64_t>& xDims,
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const std::vector<int64_t>& wDims,
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const std::vector<int64_t>& yDims,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& prePadding,
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const std::vector<int64_t>& postPadding)
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{
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const auto nDims = xDims.size();
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// GPU kernels only support 1D (3), 2D (4), and 3D (5) convolutions
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if(nDims != 3 && nDims != 4 && nDims != 5)
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{
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throw std::invalid_argument("Input tensor must have 3 dimensions (1D conv), "
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"4 dimensions (2D conv), or 5 dimensions (3D conv)");
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}
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hipdnn_test_sdk::utilities::validateConvolutionParams(
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xDims, wDims, yDims, strides, dilations, prePadding, postPadding);
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}
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// --- Kernel launchers (defined in GpuFpReferenceConvolution.cpp) ---
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static void launchFprop1d(const void* xPtr,
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const void* wPtr,
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void* yPtr,
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const std::vector<int64_t>& xDims,
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const std::vector<int64_t>& wDims,
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const std::vector<int64_t>& yDims,
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const std::vector<int64_t>& xTensorStrides,
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const std::vector<int64_t>& wTensorStrides,
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const std::vector<int64_t>& yTensorStrides,
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const std::vector<int64_t>& convStrides,
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const std::vector<int64_t>& dilations,
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const std::vector<int64_t>& padding,
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const std::vector<std::string>& defines,
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double alpha,
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double beta);
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static void launchFprop2d(const void* xPtr,
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const void* wPtr,
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void* yPtr,
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const std::vector<int64_t>& xDims,
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const std::vector<int64_t>& wDims,
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const std::vector<int64_t>& yDims,
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const std::vector<int64_t>& xTensorStrides,
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const std::vector<int64_t>& wTensorStrides,
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const std::vector<int64_t>& yTensorStrides,
|
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const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
static void launchFprop3d(const void* xPtr,
|
|
const void* wPtr,
|
|
void* yPtr,
|
|
const std::vector<int64_t>& xDims,
|
|
const std::vector<int64_t>& wDims,
|
|
const std::vector<int64_t>& yDims,
|
|
const std::vector<int64_t>& xTensorStrides,
|
|
const std::vector<int64_t>& wTensorStrides,
|
|
const std::vector<int64_t>& yTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
// --- Dgrad kernel launchers (defined in GpuFpReferenceConvolution.cpp) ---
|
|
|
|
static void launchDgrad1d(void* dxPtr,
|
|
const void* wPtr,
|
|
const void* dyPtr,
|
|
const std::vector<int64_t>& dxDims,
|
|
const std::vector<int64_t>& wDims,
|
|
const std::vector<int64_t>& dyDims,
|
|
const std::vector<int64_t>& dxTensorStrides,
|
|
const std::vector<int64_t>& wTensorStrides,
|
|
const std::vector<int64_t>& dyTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
static void launchDgrad2d(void* dxPtr,
|
|
const void* wPtr,
|
|
const void* dyPtr,
|
|
const std::vector<int64_t>& dxDims,
|
|
const std::vector<int64_t>& wDims,
|
|
const std::vector<int64_t>& dyDims,
|
|
const std::vector<int64_t>& dxTensorStrides,
|
|
const std::vector<int64_t>& wTensorStrides,
|
|
const std::vector<int64_t>& dyTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
static void launchDgrad3d(void* dxPtr,
|
|
const void* wPtr,
|
|
const void* dyPtr,
|
|
const std::vector<int64_t>& dxDims,
|
|
const std::vector<int64_t>& wDims,
|
|
const std::vector<int64_t>& dyDims,
|
|
const std::vector<int64_t>& dxTensorStrides,
|
|
const std::vector<int64_t>& wTensorStrides,
|
|
const std::vector<int64_t>& dyTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
// --- Wgrad kernel launchers (defined in GpuFpReferenceConvolution.cpp) ---
|
|
|
|
static void launchWgrad1d(const void* xPtr,
|
|
void* dwPtr,
|
|
const void* dyPtr,
|
|
const std::vector<int64_t>& xDims,
|
|
const std::vector<int64_t>& dwDims,
|
|
const std::vector<int64_t>& dyDims,
|
|
const std::vector<int64_t>& xTensorStrides,
|
|
const std::vector<int64_t>& dwTensorStrides,
|
|
const std::vector<int64_t>& dyTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
static void launchWgrad2d(const void* xPtr,
|
|
void* dwPtr,
|
|
const void* dyPtr,
|
|
const std::vector<int64_t>& xDims,
|
|
const std::vector<int64_t>& dwDims,
|
|
const std::vector<int64_t>& dyDims,
|
|
const std::vector<int64_t>& xTensorStrides,
|
|
const std::vector<int64_t>& dwTensorStrides,
|
|
const std::vector<int64_t>& dyTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
|
|
static void launchWgrad3d(const void* xPtr,
|
|
void* dwPtr,
|
|
const void* dyPtr,
|
|
const std::vector<int64_t>& xDims,
|
|
const std::vector<int64_t>& dwDims,
|
|
const std::vector<int64_t>& dyDims,
|
|
const std::vector<int64_t>& xTensorStrides,
|
|
const std::vector<int64_t>& dwTensorStrides,
|
|
const std::vector<int64_t>& dyTensorStrides,
|
|
const std::vector<int64_t>& convStrides,
|
|
const std::vector<int64_t>& dilations,
|
|
const std::vector<int64_t>& padding,
|
|
const std::vector<std::string>& defines,
|
|
double alpha,
|
|
double beta);
|
|
};
|
|
|
|
} // namespace hipdnn_gpu_ref
|