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74 lines
5.0 KiB
Python
74 lines
5.0 KiB
Python
################################################################################
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#
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# Copyright (C) 2022-2022 Advanced Micro Devices, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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################################################################################
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from ..Component import PseudoRandomGenerator
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from ..AsmUtils import inst, vgpr, sgpr
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class CustomRandomGenerator(PseudoRandomGenerator):
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"""
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Custom Pseudo Random Generator
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"""
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def __call__(self, writer):
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kStr = ""
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kStr += writer.comment3("PRND_GENERATOR: vRand=RND(vAcc, sSeed, vTid)")
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kStr += ".macro PRND_GENERATOR vRand vAcc vTemp0 vTemp1 %s" % writer.endLine
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## Previous implementation
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#kStr += inst("v_lshrrev_b32", "v[\\vRand]", hex(5), "\\vAcc", "vRand = vAcc >> 5")
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#kStr += inst("v_lshl_or_b32", "v[\\vRand]", "\\vAcc", hex(27), "v[\\vRand]", "vRand = vRand | vAcc << 27")
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#kStr += inst("v_mov_b32", "v[\\vTemp0]", "0x42fe83a3", "" )
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#kStr += inst("v_mul_u32_u24", "v[\\vRand]", "v[\\vRand]", "v[\\vTemp0]", "VRand = vRand * vTemp0") # mult lower 24 bits should be enough
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#kStr += inst("v_mov_b32", "v[\\vTemp0]", "0x6acc2047", "" )
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#kStr += inst("v_mul_u32_u24", "v[\\vTemp1]", vgpr("Serial"), "v[\\vTemp0]", "VRand = vTid * vTemp0")
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#kStr += inst("v_mov_b32", "v[\\vTemp0]", "0xdfc231fd", "" )
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#kStr += inst("v_xor_b32", "v[\\vRand]", "v[\\vRand]", "v[\\vTemp0]", "VRand = vRand ^ vTemp0")
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#kStr += inst("v_xor_b32", "v[\\vRand]", "v[\\vRand]", "v[\\vTemp1]", "VRand = vRand ^ vTemp0")
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#kStr += inst("v_xor_b32", "v[\\vRand]", "v[\\vRand]", sgpr("RNDSeed"), "VRand = vRand ^ sSeed")
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## New implementation (instruction scheduling to minimize the dependencies?)
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kStr += inst("v_and_b32", "v[\\vTemp0]", "0xFFFF", "\\vAcc" ,"vTemp0 = vAcc & 0xFFFF")
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kStr += inst("v_lshrrev_b32", "v[\\vTemp1]", hex(16), "\\vAcc", "vTemp1 = vAcc >> 16")
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kStr += inst("v_xor_b32", "v[\\vTemp0]", "v[\\vTemp0]", "v[\\vTemp1]", "VTemp0 = vTemp0 ^ vTemp1")
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kStr += inst("v_and_b32", "v[\\vTemp1]", "v[\\vTemp0]", "31" ,"vTemp1 = vTemp0 & 31")
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kStr += inst("v_lshlrev_b32", "v[\\vTemp1]", hex(11), "v[\\vTemp1]", "vTemp1 = vTemp1 << 11")
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kStr += inst("v_lshl_or_b32", "v[\\vTemp0]", "v[\\vTemp0]", hex(5), "v[\\vTemp1]", "vTemp0 = vTemp0 << 5 | vTemp1")
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kStr += inst("v_mul_u32_u24", "v[\\vTemp0]","0x700149" , "v[\\vTemp0]", "VTemp0 = vTemp0 * 0x700149") # mult lower 24 bits should be enough??
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kStr += inst("v_mul_u32_u24", "v[\\vTemp1]", 229791 , vgpr("Serial"), "VTemp1 = vTid * 229791") # TODO: use index of C/D instead of local Tid
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kStr += inst("v_xor_b32", "v[\\vRand]", "0x1337137", "v[\\vTemp0]" , "VRand = vTemp0 ^ 0x1337137")
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kStr += inst("v_xor_b32", "v[\\vRand]", "v[\\vRand]", "v[\\vTemp1]", "VRand = vRand ^ vTemp1")
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kStr += inst("v_xor_b32", "v[\\vRand]", "v[\\vRand]", sgpr("RNDSeed"), "VRand = vRand ^ sSeed")
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## NOTE: Some ideas on validation:
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# 1. to test with existing validator: if we use integer initialization pattern and the output is <=16, it will work since no rounding for int up to 16.0 for fp8.
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# 2. We can use same RND (e.g., 0) in both reference and gpu kernel by commenting out following line.
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# 3. If we use 0xFFFFFFFF, cvt_sr will always round the value up. So, tests with existing validator may fail if we don't ensure this in reference kernel of Tensile host
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# 4. A better way to validate:
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# Fix the value of RNDSeed from the caller, Save the output of this macro-function and compare it with quantization kernel's (TF-SIM's) output.
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#kStr += inst("v_mov_b32", "v[\\vRand]", "0x0", "vRand = 0x0" )
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#kStr += inst("v_mov_b32", "v[\\vRand]", "0xFFFFFFFF", "VRand = 0xffffffff" )
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###kStr += inst("v_mov_b32", "v[\\vRand]", sgpr("RNDSeed"), "vRand = RNDSeed" )
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kStr += ".endm%s" % writer.endLine
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return kStr
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