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146 lines
7.6 KiB
LLVM
146 lines
7.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
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; Test code sequences for addrspacecast with globally addressable scratch.
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target triple = "amdgcn-amd-amdhsa"
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define amdgpu_kernel void @use_private_to_flat_addrspacecast(ptr addrspace(5) %ptr) {
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; GFX1250-SDAG-LABEL: use_private_to_flat_addrspacecast:
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; GFX1250-SDAG: ; %bb.0:
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; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-SDAG-NEXT: v_nop
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; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x24 nv
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; GFX1250-SDAG-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0
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; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
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; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
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; GFX1250-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_lshlrev_b32 v1, 20, v0
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; GFX1250-SDAG-NEXT: s_cmp_lg_u32 s0, -1
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; GFX1250-SDAG-NEXT: s_cselect_b32 vcc_lo, -1, 0
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; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], src_flat_scratch_base_lo, v[0:1]
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; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_cndmask_b32 v1, 0, v1
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; GFX1250-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc_lo
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; GFX1250-SDAG-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
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; GFX1250-SDAG-NEXT: s_wait_storecnt 0x0
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; GFX1250-SDAG-NEXT: s_endpgm
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;
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; GFX1250-GISEL-LABEL: use_private_to_flat_addrspacecast:
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; GFX1250-GISEL: ; %bb.0:
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; GFX1250-GISEL-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-GISEL-NEXT: v_nop
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; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-GISEL-NEXT: s_load_b32 s0, s[4:5], 0x24 nv
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; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], src_flat_scratch_base_lo
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; GFX1250-GISEL-NEXT: v_mbcnt_lo_u32_b32 v2, -1, 0
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; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
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; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, s0, v0
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; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; GFX1250-GISEL-NEXT: s_cmp_lg_u32 s0, -1
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; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
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; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, v2, v1, vcc_lo
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; GFX1250-GISEL-NEXT: s_cselect_b32 vcc_lo, exec_lo, 0
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; GFX1250-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_cndmask_b32 v0, 0, v0, vcc_lo
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; GFX1250-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc_lo
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; GFX1250-GISEL-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
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; GFX1250-GISEL-NEXT: s_wait_storecnt 0x0
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; GFX1250-GISEL-NEXT: s_endpgm
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%stof = addrspacecast ptr addrspace(5) %ptr to ptr
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store volatile i32 0, ptr %stof
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ret void
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}
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define amdgpu_kernel void @use_private_to_flat_addrspacecast_nonnull(ptr addrspace(5) %ptr) {
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; GFX1250-SDAG-LABEL: use_private_to_flat_addrspacecast_nonnull:
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; GFX1250-SDAG: ; %bb.0:
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; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-SDAG-NEXT: v_nop
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; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x24 nv
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; GFX1250-SDAG-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0
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; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
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; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 20, v0
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; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
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; GFX1250-SDAG-NEXT: v_mov_b32_e32 v0, s0
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; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], src_flat_scratch_base_lo, v[0:1]
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; GFX1250-SDAG-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
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; GFX1250-SDAG-NEXT: s_wait_storecnt 0x0
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; GFX1250-SDAG-NEXT: s_endpgm
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;
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; GFX1250-GISEL-LABEL: use_private_to_flat_addrspacecast_nonnull:
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; GFX1250-GISEL: ; %bb.0:
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; GFX1250-GISEL-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-GISEL-NEXT: v_nop
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; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-GISEL-NEXT: s_load_b32 s0, s[4:5], 0x24 nv
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; GFX1250-GISEL-NEXT: v_mbcnt_lo_u32_b32 v2, -1, 0
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; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], src_flat_scratch_base_lo
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; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
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; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
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; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, s0, v0
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; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, v2, v1, vcc_lo
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; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX1250-GISEL-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
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; GFX1250-GISEL-NEXT: s_wait_storecnt 0x0
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; GFX1250-GISEL-NEXT: s_endpgm
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%stof = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p5(ptr addrspace(5) %ptr)
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store volatile i32 0, ptr %stof
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ret void
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}
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define amdgpu_kernel void @use_flat_to_private_addrspacecast(ptr %ptr) {
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; GFX1250-LABEL: use_flat_to_private_addrspacecast:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
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; GFX1250-NEXT: v_mov_b32_e32 v0, 0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: s_sub_co_i32 s2, s0, src_flat_scratch_base_lo
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; GFX1250-NEXT: s_cmp_lg_u64 s[0:1], 0
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; GFX1250-NEXT: s_cselect_b32 s0, s2, -1
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; GFX1250-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_storecnt 0x0
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; GFX1250-NEXT: s_endpgm
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%ftos = addrspacecast ptr %ptr to ptr addrspace(5)
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store volatile i32 0, ptr addrspace(5) %ftos
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ret void
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}
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define amdgpu_kernel void @use_flat_to_private_addrspacecast_nonnull(ptr %ptr) {
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; GFX1250-SDAG-LABEL: use_flat_to_private_addrspacecast_nonnull:
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; GFX1250-SDAG: ; %bb.0:
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; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-SDAG-NEXT: v_nop
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; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x24 nv
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; GFX1250-SDAG-NEXT: v_mov_b32_e32 v0, 0
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; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
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; GFX1250-SDAG-NEXT: s_sub_co_i32 s0, s0, src_flat_scratch_base_lo
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; GFX1250-SDAG-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
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; GFX1250-SDAG-NEXT: s_wait_storecnt 0x0
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; GFX1250-SDAG-NEXT: s_endpgm
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;
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; GFX1250-GISEL-LABEL: use_flat_to_private_addrspacecast_nonnull:
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; GFX1250-GISEL: ; %bb.0:
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; GFX1250-GISEL-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-GISEL-NEXT: v_nop
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; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
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; GFX1250-GISEL-NEXT: v_mov_b32_e32 v0, 0
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; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
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; GFX1250-GISEL-NEXT: s_sub_co_i32 s0, s0, src_flat_scratch_base_lo
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; GFX1250-GISEL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
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; GFX1250-GISEL-NEXT: s_wait_storecnt 0x0
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; GFX1250-GISEL-NEXT: s_endpgm
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%ftos = call ptr addrspace(5) @llvm.amdgcn.addrspacecast.nonnull.p5.p0(ptr %ptr)
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store volatile i32 0, ptr addrspace(5) %ftos
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ret void
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}
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