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TheRock/compiler/amd-llvm/llvm/test/CodeGen/PowerPC/aix-tocdata-fastisel.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

29 lines
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LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -fast-isel -verify-machineinstrs \
; RUN: -code-model=small | FileCheck %s --check-prefix=SMALL
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -fast-isel -verify-machineinstrs \
; RUN: -code-model=large | FileCheck %s --check-prefix=LARGE
@a = global i32 0, align 4 #0
define signext i32 @foo() #1 {
; SMALL-LABEL: foo:
; SMALL: # %bb.0: # %entry
; SMALL-NEXT: la 3, a[TD](2)
; SMALL-NEXT: lwa 3, 0(3)
; SMALL-NEXT: blr
;
; LARGE-LABEL: foo:
; LARGE: # %bb.0: # %entry
; LARGE-NEXT: addis 3, a[TD]@u(2)
; LARGE-NEXT: la 3, a[TD]@l(3)
; LARGE-NEXT: lwa 3, 0(3)
; LARGE-NEXT: blr
entry:
%0 = load i32, ptr @a, align 4
ret i32 %0
}
attributes #0 = { "toc-data" }
attributes #1 = { noinline optnone }