derek.holloway
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108 lines
3.5 KiB
LLVM
108 lines
3.5 KiB
LLVM
; Test vector (or (and X, Z), (and Y, (not Z))) patterns.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test v16i8.
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define <16 x i8> @f1(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3) {
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; CHECK-LABEL: f1:
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; CHECK: vsel %v24, %v24, %v26, %v28
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; CHECK: br %r14
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%not = xor <16 x i8> %val3, <i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1>
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%and1 = and <16 x i8> %val1, %val3
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%and2 = and <16 x i8> %val2, %not
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%ret = or <16 x i8> %and1, %and2
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ret <16 x i8> %ret
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}
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; ...and again with the XOR applied to the other operand of the AND.
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define <16 x i8> @f2(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3) {
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; CHECK-LABEL: f2:
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; CHECK: vsel %v24, %v26, %v24, %v28
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; CHECK: br %r14
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%not = xor <16 x i8> %val3, <i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1>
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%and1 = and <16 x i8> %val1, %not
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%and2 = and <16 x i8> %val2, %val3
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%ret = or <16 x i8> %and1, %and2
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ret <16 x i8> %ret
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}
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; Test v8i16.
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define <8 x i16> @f3(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3) {
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; CHECK-LABEL: f3:
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; CHECK: vsel %v24, %v24, %v26, %v28
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; CHECK: br %r14
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%not = xor <8 x i16> %val3, <i16 -1, i16 -1, i16 -1, i16 -1,
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i16 -1, i16 -1, i16 -1, i16 -1>
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%and1 = and <8 x i16> %val1, %val3
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%and2 = and <8 x i16> %val2, %not
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%ret = or <8 x i16> %and1, %and2
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ret <8 x i16> %ret
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}
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; ...and again with the XOR applied to the other operand of the AND.
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define <8 x i16> @f4(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3) {
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; CHECK-LABEL: f4:
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; CHECK: vsel %v24, %v26, %v24, %v28
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; CHECK: br %r14
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%not = xor <8 x i16> %val3, <i16 -1, i16 -1, i16 -1, i16 -1,
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i16 -1, i16 -1, i16 -1, i16 -1>
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%and1 = and <8 x i16> %val1, %not
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%and2 = and <8 x i16> %val2, %val3
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%ret = or <8 x i16> %and1, %and2
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ret <8 x i16> %ret
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}
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; Test v4i32.
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define <4 x i32> @f5(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3) {
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; CHECK-LABEL: f5:
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; CHECK: vsel %v24, %v24, %v26, %v28
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; CHECK: br %r14
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%not = xor <4 x i32> %val3, <i32 -1, i32 -1, i32 -1, i32 -1>
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%and1 = and <4 x i32> %val1, %val3
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%and2 = and <4 x i32> %val2, %not
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%ret = or <4 x i32> %and1, %and2
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ret <4 x i32> %ret
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}
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; ...and again with the XOR applied to the other operand of the AND.
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define <4 x i32> @f6(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3) {
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; CHECK-LABEL: f6:
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; CHECK: vsel %v24, %v26, %v24, %v28
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; CHECK: br %r14
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%not = xor <4 x i32> %val3, <i32 -1, i32 -1, i32 -1, i32 -1>
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%and1 = and <4 x i32> %val1, %not
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%and2 = and <4 x i32> %val2, %val3
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%ret = or <4 x i32> %and1, %and2
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ret <4 x i32> %ret
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}
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; Test v2i64.
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define <2 x i64> @f7(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3) {
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; CHECK-LABEL: f7:
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; CHECK: vsel %v24, %v24, %v26, %v28
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; CHECK: br %r14
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%not = xor <2 x i64> %val3, <i64 -1, i64 -1>
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%and1 = and <2 x i64> %val1, %val3
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%and2 = and <2 x i64> %val2, %not
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%ret = or <2 x i64> %and1, %and2
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ret <2 x i64> %ret
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}
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; ...and again with the XOR applied to the other operand of the AND.
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define <2 x i64> @f8(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3) {
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; CHECK-LABEL: f8:
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; CHECK: vsel %v24, %v26, %v24, %v28
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; CHECK: br %r14
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%not = xor <2 x i64> %val3, <i64 -1, i64 -1>
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%and1 = and <2 x i64> %val1, %not
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%and2 = and <2 x i64> %val2, %val3
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%ret = or <2 x i64> %and1, %and2
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ret <2 x i64> %ret
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}
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