derek.holloway
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118 lines
4.5 KiB
ArmAsm
118 lines
4.5 KiB
ArmAsm
// COM: Test HotSwap in-place patch s_barrier_signal_isfirst -> s_barrier_signal
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// COM: for GFX1250 A0. A0 may return stale SCC before the barrier completes
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// COM: when the barrier ID names a user cluster barrier; the non-isfirst
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// COM: variant shares encoding size and operand layout but does not write SCC.
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// RUN: %clang --target=amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf \
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// RUN: | %FileCheck --check-prefix=API %s
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// API: RESULT: SUCCESS
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// COM: Verify the patched layout: both isfirst sites are replaced by the
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// COM: non-isfirst variant in place with their operand values preserved
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// COM: (-1 stays -1, -3 stays -3). Surrounding waits and endpgm stay put.
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// COM: DISASM-NOT brackets ensure no s_barrier_signal_isfirst remains
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// COM: anywhere. Wait operands are shown as raw 16-bit hex by llvm-objdump
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// COM: (signed -1 = 0xffff, -3 = 0xfffd).
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// DISASM-NOT: s_barrier_signal_isfirst
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// DISASM: s_barrier_signal -1
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// DISASM-NEXT: s_barrier_wait 0xffff
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// DISASM-NEXT: s_barrier_signal -3
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// DISASM-NEXT: s_barrier_wait 0xfffd
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// DISASM-NEXT: s_endpgm
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// DISASM-NOT: s_barrier_signal_isfirst
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// COM: Idempotency: rewriting the patched output again must produce
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// COM: identical bytes.
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out2.elf \
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// RUN: | %FileCheck --check-prefix=API2 %s
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// API2: RESULT: SUCCESS
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// RUN: cmp %t.out.elf %t.out2.elf
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// COM: One-sided stepping annotations must also be honored. An explicit A0
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// COM: source with a generic target is not B0->A0, and a generic source with
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// COM: an explicit B0 target is not B0->A0 either.
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific- \
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// RUN: amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.a0generic.elf \
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// RUN: | %FileCheck --check-prefix=A0GENERIC-API %s
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// A0GENERIC-API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.a0generic.elf | %FileCheck --check-prefix=NO-PATCH %s
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific+ \
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// RUN: --output %t.genericb0.elf \
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// RUN: | %FileCheck --check-prefix=GENERICB0-API %s
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// GENERICB0-API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.genericb0.elf | %FileCheck --check-prefix=NO-PATCH %s
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// NO-PATCH: s_barrier_signal_isfirst -1
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// NO-PATCH-NEXT: s_barrier_wait 0xffff
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// NO-PATCH-NEXT: s_barrier_signal_isfirst -3
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// NO-PATCH-NEXT: s_barrier_wait 0xfffd
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// NO-PATCH-NEXT: s_endpgm
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// COM: With explicit B0->B0 stepping, entry trampolines must not accidentally
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// COM: enable B0-to-A0 instruction patches. The isfirst opcodes remain, while
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// COM: the kernel descriptor is still redirected through an appended entry stub.
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific+ \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific+ \
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// RUN: --entry-trampolines --output %t.b0b0.elf \
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// RUN: | %FileCheck --check-prefix=B0B0-API %s
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// B0B0-API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.b0b0.elf | %FileCheck --check-prefix=B0B0 %s
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// B0B0: s_barrier_signal_isfirst -1
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// B0B0-NEXT: s_barrier_wait 0xffff
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// B0B0-NEXT: s_barrier_signal_isfirst -3
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// B0B0-NEXT: s_barrier_wait 0xfffd
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// B0B0: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_barrier_isfirst
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.p2align 8
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.type test_barrier_isfirst,@function
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test_barrier_isfirst:
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// Two isfirst sites with different barrier IDs; both must be swapped
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// to s_barrier_signal in place with their operand values preserved.
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s_barrier_signal_isfirst -1
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s_barrier_wait -1
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s_barrier_signal_isfirst -3
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s_barrier_wait -3
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s_endpgm
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.Ltest_barrier_isfirst_end:
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.size test_barrier_isfirst, .Ltest_barrier_isfirst_end-test_barrier_isfirst
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.rodata
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.p2align 8
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.amdhsa_kernel test_barrier_isfirst
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.amdhsa_next_free_vgpr 1
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.amdhsa_next_free_sgpr 2
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.end_amdhsa_kernel
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: test_barrier_isfirst
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.symbol: test_barrier_isfirst.kd
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.sgpr_count: 2
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.vgpr_count: 1
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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