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82 lines
3.3 KiB
ArmAsm
82 lines
3.3 KiB
ArmAsm
// COM: Selectivity test for the s_barrier_signal_isfirst -> s_barrier_signal
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// COM: in-place patch. A kernel containing isfirst (IMM), non-isfirst, and
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// COM: the _M0 form must have only the IMM isfirst sites rewritten; both
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// COM: non-isfirst and _M0 sites must pass through unchanged. This guards
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// COM: against a regression where the dispatcher accidentally matches the
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// COM: non-isfirst mnemonic (e.g. via prefix or contains() rather than
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// COM: equality) and documents the intentional _M0 passthrough.
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// RUN: %clang --target=amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf \
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// RUN: | %FileCheck --check-prefix=API %s
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// API: RESULT: SUCCESS
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// COM: Verify the patched layout. Kernel order is:
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// COM: s_barrier_signal_isfirst -1 (IMM, gets swapped)
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// COM: s_barrier_wait -1 (unchanged)
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// COM: s_barrier_signal -3 (already non-isfirst, unchanged)
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// COM: s_barrier_wait -3 (unchanged)
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// COM: s_barrier_signal_isfirst m0 (_M0 form, intentionally NOT swapped)
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// COM: s_barrier_wait 0xffff (unchanged)
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// COM: s_barrier_signal_isfirst -1 (IMM, gets swapped)
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// COM: s_barrier_wait -1 (unchanged)
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// COM: s_endpgm
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// COM: After patching, the two IMM isfirst sites become s_barrier_signal -1.
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// COM: The _M0 site passes through unchanged because the compiler never
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// COM: emits it (separate mnemonic, intentional skip with diagnostic).
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// COM: CHECK-NEXT chain pins the exact interleaving. The leading CHECK-NOT
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// COM: only covers the range before the first match; the _M0 site in the
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// COM: middle is verified structurally by the CHECK-NEXT chain itself.
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// DISASM-NOT: s_barrier_signal_isfirst -
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// DISASM: s_barrier_signal -1
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// DISASM-NEXT: s_barrier_wait 0xffff
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// DISASM-NEXT: s_barrier_signal -3
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// DISASM-NEXT: s_barrier_wait 0xfffd
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// DISASM-NEXT: s_barrier_signal_isfirst m0
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// DISASM-NEXT: s_barrier_wait 0xffff
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// DISASM-NEXT: s_barrier_signal -1
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// DISASM-NEXT: s_barrier_wait 0xffff
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// DISASM-NEXT: s_endpgm
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// DISASM-NOT: s_barrier_signal_isfirst -
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// COM: Idempotency: second rewrite must produce identical bytes (the swapped
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// COM: kernel has no isfirst left, so the second pass is a no-op).
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out2.elf \
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// RUN: | %FileCheck --check-prefix=API2 %s
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// API2: RESULT: SUCCESS
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// RUN: cmp %t.out.elf %t.out2.elf
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_barrier_mixed
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.p2align 8
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.type test_barrier_mixed,@function
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test_barrier_mixed:
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s_barrier_signal_isfirst -1
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s_barrier_wait -1
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// Pre-existing non-isfirst site: verifies the dispatcher matches on
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// equality, not prefix or substring.
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s_barrier_signal -3
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s_barrier_wait -3
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// _M0 form: separate mnemonic, intentionally not patched.
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s_barrier_signal_isfirst m0
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s_barrier_wait -1
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s_barrier_signal_isfirst -1
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s_barrier_wait -1
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s_endpgm
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.Ltest_barrier_mixed_end:
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.size test_barrier_mixed, .Ltest_barrier_mixed_end-test_barrier_mixed
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.rodata
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.p2align 8
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.amdhsa_kernel test_barrier_mixed
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.amdhsa_next_free_vgpr 1
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.amdhsa_next_free_sgpr 2
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.end_amdhsa_kernel
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