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57 lines
1.9 KiB
ArmAsm
57 lines
1.9 KiB
ArmAsm
// COM: HSV-010 regression: a production PyTorch/AITER object contains the
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// COM: register-target call `s_swap_pc_i64 s[30:31], s[0:1]`. The target is
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// COM: not statically known, so direct-target collection must ignore it rather
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// COM: than aborting an otherwise valid rewrite.
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// COM:
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// COM: Keep a real DS two-address patch in this reduced object so the rewrite
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// COM: creates a trampoline and exercises the production failure path.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: env AMD_COMGR_EMIT_VERBOSE_LOGS=1 hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf 2>&1 \
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// RUN: | %FileCheck --check-prefix=API %s
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// API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// DISASM-LABEL: <test_indirect_call>:
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// DISASM: s_swap_pc_i64 s[30:31], s[0:1]
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// DISASM-NEXT: s_branch
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// DISASM-NEXT: s_nop 0
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: s_endpgm
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// DISASM-NOT: ds_load_2addr_stride64_b32
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// DISASM: ds_load_b32 v0
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// DISASM-NEXT: ds_load_b32 v1
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: s_branch
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --check-idempotent \
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// RUN: | %FileCheck --check-prefix=IDEM %s
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// IDEM: IDEMPOTENT: YES
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_indirect_call
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.p2align 8
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.type test_indirect_call,@function
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test_indirect_call:
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s_swap_pc_i64 s[30:31], s[0:1]
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ds_load_2addr_stride64_b32 v[0:1], v2 offset0:1 offset1:3
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s_wait_dscnt 0x0
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s_endpgm
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.Ltest_indirect_call_end:
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.size test_indirect_call, .Ltest_indirect_call_end-test_indirect_call
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.rodata
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.p2align 8
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.amdhsa_kernel test_indirect_call
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.amdhsa_next_free_vgpr 3
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.amdhsa_next_free_sgpr 32
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.amdhsa_inst_pref_size 2
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.end_amdhsa_kernel
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