derek.holloway
7502bf64a4
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96 lines
2.9 KiB
ArmAsm
96 lines
2.9 KiB
ArmAsm
// COM: Exercise the large-object SGPR-usage caches with two patch sites in a
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// COM: function containing a direct call. The first site builds the per-function
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// COM: summary, the call promotes it to the whole-object summary, and the
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// COM: second site reuses both cached results. Non-NOP straight-line windows
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// COM: let each far site carry its set-PC sequence without a gateway.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: env AMD_COMGR_EMIT_VERBOSE_LOGS=1 hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf 2>&1 | %FileCheck --check-prefix=LOG %s
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// LOG: hotswap: applied 2 instruction patches
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// LOG: hotswap: growWithTrampolines: appended 2 trampolines
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// LOG: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM \
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// RUN: --implicit-check-not=s_add_pc_i64 %s
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// RUN: %llvm-readelf --notes %t.out.elf | %FileCheck --check-prefix=META %s
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// DISASM-LABEL: <test_large_usage_cache>:
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// DISASM: s_get_pc_i64
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// DISASM: s_set_pc_i64
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// DISASM: s_call_i64
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// DISASM: s_get_pc_i64
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// DISASM: s_set_pc_i64
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// DISASM: tensor_load_to_lds
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// DISASM: tensor_load_to_lds
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// META: .name: test_large_usage_cache
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// META: .sgpr_count: 38
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --check-idempotent | %FileCheck --check-prefix=IDEM %s
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// IDEM: IDEMPOTENT: YES
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_large_usage_cache
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.p2align 8
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.type test_large_usage_cache,@function
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test_large_usage_cache:
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tensor_load_to_lds s[0:3], s[4:11]
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s_mov_b32 s30, s30
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s_mov_b32 s30, s30
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s_mov_b32 s30, s30
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s_mov_b32 s30, s30
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s_mov_b32 s30, s30
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s_mov_b32 s30, s30
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s_call_i64 s[20:21], cache_helper
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tensor_load_to_lds s[0:3], s[4:11]
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s_mov_b32 s31, s31
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s_mov_b32 s31, s31
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s_mov_b32 s31, s31
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s_mov_b32 s31, s31
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s_mov_b32 s31, s31
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s_mov_b32 s31, s31
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s_endpgm
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.Ltest_large_usage_cache_end:
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.size test_large_usage_cache, .Ltest_large_usage_cache_end-test_large_usage_cache
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.type cache_helper,@function
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cache_helper:
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s_set_pc_i64 s[20:21]
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.Lcache_helper_end:
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.size cache_helper, .Lcache_helper_end-cache_helper
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// Keep the appended pool beyond short-branch reach without supplying NOP
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// padding that could bypass the straight-line expansion path above.
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.rept 70000
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s_mov_b32 s0, s1
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.endr
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.rodata
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.p2align 8
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.amdhsa_kernel test_large_usage_cache
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.amdhsa_next_free_vgpr 1
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.amdhsa_next_free_sgpr 34
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.end_amdhsa_kernel
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: test_large_usage_cache
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.symbol: test_large_usage_cache.kd
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.sgpr_count: 34
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.vgpr_count: 1
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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