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75 lines
2.7 KiB
ArmAsm
75 lines
2.7 KiB
ArmAsm
// COM: A declared function entry inside a PC-materialized call sequence can
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// COM: bypass s_get_pc_i64 even when no direct branch targets that instruction.
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// COM: The register call must remain unresolved, which disables every rewrite
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// COM: that could consume an unknown original .text destination.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: env AMD_COMGR_EMIT_VERBOSE_LOGS=1 hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --expect-status ERROR 2>&1 \
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// RUN: | %FileCheck --check-prefixes=LOG,API %s
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// LOG: hotswap: unresolved call target at 0x8 (s_swap_pc_i64)
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// LOG: hotswap: unresolved control-flow target disables NOP-sled emission,
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// LOG-SAME: trampoline coalescing, source relocation, and .text gateways
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// LOG: hotswap: error: no safe short-branch gateway for far site
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// API: RESULT: ERROR
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_pc_materialized_declared_entry
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.p2align 8
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.type test_pc_materialized_declared_entry,@function
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test_pc_materialized_declared_entry:
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s_get_pc_i64 s[2:3]
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// This symbol is an independent semantic entry. Entering here leaves s[2:3]
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// caller-defined, so the apparent linear target calculation is not a proof.
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.globl alternate_pc_materialization_entry
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.type alternate_pc_materialization_entry,@function
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alternate_pc_materialization_entry:
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s_add_nc_u64 s[2:3], s[2:3], 16
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s_swap_pc_i64 s[0:1], s[2:3]
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.Lalternate_pc_materialization_entry_end:
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.size alternate_pc_materialization_entry, .Lalternate_pc_materialization_entry_end-alternate_pc_materialization_entry
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:1 offset1:2
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ds_load_2addr_stride64_b64 v[4:7], v8 offset0:3 offset1:4
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s_wait_dscnt 0x0
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s_endpgm
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.Ltest_pc_materialized_declared_entry_end:
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.size test_pc_materialized_declared_entry, .Ltest_pc_materialized_declared_entry_end-test_pc_materialized_declared_entry
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// This space would be usable for gateways only if every control-flow target
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// were known.
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.fill 64, 1, 0
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// Keep the trampoline pool outside the signed s_branch range.
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.rept 40000
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s_mov_b32 s0, s1
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.endr
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.rodata
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.p2align 8
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.amdhsa_kernel test_pc_materialized_declared_entry
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.amdhsa_next_free_vgpr 9
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.amdhsa_next_free_sgpr 4
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.end_amdhsa_kernel
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: test_pc_materialized_declared_entry
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.symbol: test_pc_materialized_declared_entry.kd
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.sgpr_count: 4
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.vgpr_count: 9
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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