derek.holloway
7502bf64a4
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149 lines
5.0 KiB
ArmAsm
149 lines
5.0 KiB
ArmAsm
// COM: Test HotSwap trampoline patching for cluster_load forms that are not
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// COM: demoted in place. Remaining cluster loads must run with M0.wg_mask
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// COM: bits [15:0] cleared on A0, while preserving the incoming M0 value for
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// COM: surrounding code.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --output %t.out.elf \
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// RUN: | %FileCheck --check-prefix=API %s
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// API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// RUN: %llvm-readelf --notes %t.out.elf | %FileCheck --check-prefix=METADATA %s
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// DISASM-LABEL: <test_cluster_mask>:
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// DISASM: s_branch
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// DISASM: s_wait_loadcnt
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// DISASM: s_branch
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// DISASM: s_wait_loadcnt
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// DISASM: s_branch
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// DISASM: s_wait_loadcnt
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// DISASM: s_branch
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// DISASM: s_wait_loadcnt
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// DISASM: s_branch
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// DISASM: s_wait_loadcnt
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// DISASM: s_branch
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// DISASM: s_wait_loadcnt
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// DISASM: s_endpgm
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// DISASM: s_mov_b32 [[SCR0:s[0-9]+]], m0
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// DISASM-NEXT: s_pack_hh_b32_b16 m0, 0, m0
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// DISASM-NEXT: cluster_load_b64 v[{{[0-9:]+}}], v{{[0-9]+}}, s[{{[0-9:]+}}]
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// DISASM-NEXT: s_mov_b32 m0, [[SCR0]]
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// DISASM-NEXT: s_branch
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// DISASM: s_mov_b32 [[SCR1:s[0-9]+]], m0
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// DISASM-NEXT: s_pack_hh_b32_b16 m0, 0, m0
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// DISASM-NEXT: cluster_load_async_to_lds_b32 v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9:]+}}]
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// DISASM-NEXT: s_mov_b32 m0, [[SCR1]]
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// DISASM-NEXT: s_branch
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// DISASM: s_mov_b32 [[SCR2:s[0-9]+]], m0
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// DISASM-NEXT: s_pack_hh_b32_b16 m0, 0, m0
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// DISASM-NEXT: cluster_load_b128 v[{{[0-9:]+}}], v{{[0-9]+}}, s[{{[0-9:]+}}] offset:64 scale_offset th:TH_LOAD_NT_HT scope:SCOPE_DEV
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// DISASM-NEXT: s_mov_b32 m0, [[SCR2]]
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// DISASM-NEXT: s_branch
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// DISASM: s_mov_b32 [[SCR3:s[0-9]+]], m0
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// DISASM-NEXT: s_pack_hh_b32_b16 m0, 0, m0
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// DISASM-NEXT: cluster_load_async_to_lds_b8 v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9:]+}}] offset:-64 th:TH_LOAD_NT_HT scope:SCOPE_DEV
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// DISASM-NEXT: s_mov_b32 m0, [[SCR3]]
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// DISASM-NEXT: s_branch
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// DISASM: s_mov_b32 [[SCR4:s[0-9]+]], m0
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// DISASM-NEXT: s_pack_hh_b32_b16 m0, 0, m0
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// DISASM-NEXT: cluster_load_async_to_lds_b64 v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9:]+}}] scale_offset th:TH_LOAD_BYPASS scope:SCOPE_SYS
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// DISASM-NEXT: s_mov_b32 m0, [[SCR4]]
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// DISASM-NEXT: s_branch
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// DISASM: s_mov_b32 [[SCR5:s[0-9]+]], m0
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// DISASM-NEXT: s_pack_hh_b32_b16 m0, 0, m0
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// DISASM-NEXT: cluster_load_async_to_lds_b128 v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9:]+}}] offset:64
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// DISASM-NEXT: s_mov_b32 m0, [[SCR5]]
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// DISASM-NEXT: s_branch
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// METADATA: .name: test_cluster_mask
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// METADATA: .sgpr_count: 17
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// COM: Idempotency: rewriting the output again should produce identical bytes.
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --check-idempotent \
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// RUN: | %FileCheck --check-prefix=IDEM %s
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// IDEM: IDEMPOTENT: YES
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// COM: No scratch SGPR means the A0 M0 mask workaround cannot be
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// COM: emitted, so the API reports ERROR instead of returning unsafe code.
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// RUN: sed -e 's/.amdhsa_next_free_sgpr 16/.amdhsa_next_free_sgpr 106/' \
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// RUN: -e 's/.sgpr_count: 16/.sgpr_count: 106/' %s > %t.highsgpr.s
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib \
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// RUN: %t.highsgpr.s -o %t.highsgpr.elf
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// RUN: hotswap-rewrite %t.highsgpr.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --expect-status ERROR \
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// RUN: | %FileCheck --check-prefix=NO-SCRATCH %s
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// NO-SCRATCH: RESULT: ERROR
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_cluster_mask
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.p2align 8
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.type test_cluster_mask,@function
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test_cluster_mask:
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cluster_load_b64 v[0:1], v2, s[4:5]
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s_wait_loadcnt 0x0
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cluster_load_async_to_lds_b32 v3, v4, s[6:7]
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s_wait_loadcnt 0x0
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cluster_load_b128 v[8:11], v12, s[8:9] offset:64 scale_offset th:TH_LOAD_NT_HT scope:SCOPE_DEV
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s_wait_loadcnt 0x0
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cluster_load_async_to_lds_b8 v13, v14, s[10:11] offset:-64 th:TH_LOAD_NT_HT scope:SCOPE_DEV
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s_wait_loadcnt 0x0
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cluster_load_async_to_lds_b64 v15, v16, s[12:13] scale_offset th:TH_LOAD_BYPASS scope:SCOPE_SYS
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s_wait_loadcnt 0x0
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cluster_load_async_to_lds_b128 v17, v18, s[14:15] offset:64
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s_wait_loadcnt 0x0
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s_endpgm
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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.Ltest_cluster_mask_end:
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.size test_cluster_mask, .Ltest_cluster_mask_end-test_cluster_mask
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.rodata
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.p2align 8
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.amdhsa_kernel test_cluster_mask
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.amdhsa_next_free_vgpr 20
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.amdhsa_next_free_sgpr 16
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.end_amdhsa_kernel
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: test_cluster_mask
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.symbol: test_cluster_mask.kd
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.sgpr_count: 16
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.vgpr_count: 20
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 8
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.wavefront_size: 64
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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