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146 lines
5.4 KiB
ArmAsm
146 lines
5.4 KiB
ArmAsm
// COM: Test the offset-overflow guard in extractDsOperands. The single-
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// COM: address DS instructions that the trampoline emits use a 16-bit
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// COM: immediate offset field (max 0xFFFF = 65535 bytes). The stride64
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// COM: forms scale a raw 8-bit per-operand index by (64 * ElemBytes), so
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// COM: ds_*_2addr_stride64_b64 (Scale = 512) overflows for any raw index
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// COM: >= 128:
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// COM:
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// COM: raw 128 * 512 = 65536 -- one past the limit
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// COM: raw 255 * 512 = 130560 -- worst case
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// COM:
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// COM: When that happens the patch is not representable. Returning the
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// COM: original broken-on-A0 instruction would be unsafe, so the rewrite must
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// COM: fail rather than emit a silently truncated replacement.
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// COM:
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// COM: Coverage:
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// COM: test_ds_load_b64_overflow : raw 128/255 -> scaled 65536/130560
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// COM: (both off0 and off1 overflow)
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// COM: test_ds_load_b64_inrange : raw 1/2 -> scaled 512/1024
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// COM: (control: in-range stride64_b64 IS rewritten)
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// COM: Capture the verbose log on stderr to confirm the overflow message
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// COM: fires for the out-of-range kernel. AMD_COMGR_EMIT_VERBOSE_LOGS=1
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// COM: routes log() to llvm::errs(); we merge it into stdout for FileCheck.
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// RUN: env AMD_COMGR_EMIT_VERBOSE_LOGS=1 \
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// RUN: hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250 amdgcn-amd-amdhsa--gfx1250 \
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// RUN: --expect-status ERROR 2>&1 \
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// RUN: | %FileCheck --check-prefix=LOG %s
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// COM: Pin the message shape (mnemonic, both raw + scaled values, the
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// COM: 16-bit limit, and the required-rewrite failure closer) so a regression
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// COM: in the message format or the limit constant fails here, not in some
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// COM: downstream-symptoms test. The helper's specific message is the only
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// COM: diagnostic; patchDs2Addr does not add a second generic failure.
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// COM: RESULT: ERROR comes last because leaving the required A0 rewrite
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// COM: unapplied would be unsafe.
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// LOG: hotswap: error: ds_load_2addr_stride64_b64 scaled offsets exceed
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// LOG-SAME: the single-address DS 16-bit field
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// LOG-SAME: off0=raw 128 * scale 512 = 65536
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// LOG-SAME: off1=raw 255 * scale 512 = 130560
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// LOG-SAME: max 65535
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// LOG-SAME: required A0 rewrite cannot continue
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// LOG: RESULT: ERROR
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// ---- Kernel 1: out-of-range -- patch must NOT fire --------------------------
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// COM: Both per-operand indices scale past 0xFFFF (off0:128 -> 65536,
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// COM: off1:255 -> 130560). The trampoline must reject the patch and
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// COM: leave ds_load_2addr_stride64_b64 in the kernel verbatim. No
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// COM: s_branch is inserted, no replacement ds_load_b64 appears, the
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// COM: NOP sled is unused. The DISASM-NOT lines pin all three negatives.
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// DISASM-LABEL: <test_ds_load_b64_overflow>:
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// DISASM: ds_load_2addr_stride64_b64 v[0:3], v4 offset0:128 offset1:255
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// DISASM-NEXT: s_wait_dscnt 0x0
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// DISASM-NEXT: s_endpgm
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// DISASM-NOT: s_branch
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// DISASM-NOT: ds_load_b64
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_ds_load_b64_overflow
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.p2align 8
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.type test_ds_load_b64_overflow,@function
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test_ds_load_b64_overflow:
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:128 offset1:255
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s_wait_dscnt 0x0
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s_endpgm
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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.Ltest_ds_load_b64_overflow_end:
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.size test_ds_load_b64_overflow, .Ltest_ds_load_b64_overflow_end-test_ds_load_b64_overflow
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// ---- Kernel 2: in-range -- patch MUST fire (negative control) --------------
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// COM: Same opcode as kernel 1 but raw indices 1 and 2 (scaled 512 and
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// COM: 1024, well below 0xFFFF). The patch must fire here -- otherwise
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// COM: kernel 1 above would pass for the wrong reason (patch broken
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// COM: across the board, not specifically gated by the overflow check).
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// DISASM-LABEL: <test_ds_load_b64_inrange>:
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// DISASM-NOT: ds_load_2addr_stride64_b64
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// DISASM: s_branch
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// DISASM: s_wait_dscnt 0x0
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// DISASM: ds_load_b64 v[0:1], v4 offset:512
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// DISASM-NEXT: ds_load_b64 v[2:3], v4 offset:1024
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// DISASM: s_branch
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.globl test_ds_load_b64_inrange
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.p2align 8
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.type test_ds_load_b64_inrange,@function
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test_ds_load_b64_inrange:
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ds_load_2addr_stride64_b64 v[0:3], v4 offset0:1 offset1:2
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s_wait_dscnt 0x0
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s_endpgm
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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s_nop 0
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.Ltest_ds_load_b64_inrange_end:
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.size test_ds_load_b64_inrange, .Ltest_ds_load_b64_inrange_end-test_ds_load_b64_inrange
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// COM: Idempotency. For the overflow kernel the original instruction is
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// COM: still a ds_*_2addr_*, so the second pass would attempt to patch
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// COM: it again, hit the same overflow, and again leave it alone. For
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// COM: the in-range kernel the body now uses plain ds_load_b64, which
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// COM: the dispatcher does not recognise, so it is also untouched. Net:
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// COM: byte-identical output between passes.
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// COM: No output is produced after a required-patch failure, so idempotency is
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// COM: intentionally not checked for the rejected object.
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.rodata
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.p2align 8
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.amdhsa_kernel test_ds_load_b64_overflow
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.amdhsa_next_free_vgpr 5
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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.amdhsa_kernel test_ds_load_b64_inrange
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.amdhsa_next_free_vgpr 5
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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