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38 lines
1.6 KiB
ArmAsm
38 lines
1.6 KiB
ArmAsm
// On gfx1250, an immediate MODE write establishes all four VGPR-MSB fields.
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// Immediate bits [19:12] are rotated into s_set_vgpr_msb order; 0x81 becomes
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// mode 0x60 and must be restored around the split WMMA's upper half.
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// RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1250 -nostdlib %s -o %t.elf
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// RUN: env AMD_COMGR_EMIT_VERBOSE_LOGS=1 hotswap-rewrite %t.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific+ \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific- \
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// RUN: --output %t.out.elf 2>&1 | %FileCheck --check-prefix=API %s
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// API: WMMA split: patched v_wmma_f32_16x16x128_fp8_fp8
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// API-NOT: error:
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// API: RESULT: SUCCESS
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// RUN: %llvm-objdump -d %t.out.elf | %FileCheck --check-prefix=DISASM %s
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// DISASM-LABEL: <test_wmma_setreg_mode>:
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// DISASM: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 0x81000
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// DISASM: s_branch
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// DISASM: s_set_vgpr_msb 0x6050
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// DISASM-NEXT: v_wmma_f32_16x16x64_fp8_fp8
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// DISASM-NEXT: s_set_vgpr_msb 0x5060
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// RUN: hotswap-rewrite %t.out.elf \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific- \
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// RUN: amdgcn-amd-amdhsa--gfx1250:gfx1250-b0-specific- \
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// RUN: --check-idempotent | %FileCheck --check-prefix=IDEM %s
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// IDEM: IDEMPOTENT: YES
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.text
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.globl test_wmma_setreg_mode
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.p2align 8
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.type test_wmma_setreg_mode,@function
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test_wmma_setreg_mode:
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s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 0x81000
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v_wmma_f32_16x16x128_fp8_fp8 v[32:39], v[0:15], v[16:31], 0
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s_endpgm
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.size test_wmma_setreg_mode, .-test_wmma_setreg_mode
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