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55 lines
1.9 KiB
Plaintext
55 lines
1.9 KiB
Plaintext
// REQUIRES: comgr-has-spirv-translator
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// COM: Generate a SPIRV file from a HIP kernel
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// RUN: %clang -x hip --offload-arch=amdgcnspirv -nogpulib -nogpuinc \
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// RUN: --no-gpu-bundle-output --offload-device-only -O3 %s -o %t.spv
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// COM: Run Comgr Translator to covert SPIRV back to LLVM IR
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// RUN: spirv-translator %t.spv -o %t.translated.bc
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// COM: Dissasemble LLVM IR bitcode to LLVM IR text
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// RUN: %llvm-dis %t.translated.bc -o - | %FileCheck %s
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// COM: Verify LLVM IR text
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// CHECK: target triple = "amdgcn-amd-amdhsa"
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// CHECK: define void @_Z11clean_valuePf
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// CHECK: define amdgpu_kernel void @_Z9add_valuePfS_S_
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#include <cstdlib>
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#define __constant__ __attribute__((constant))
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#define __device__ __attribute__((device))
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#define __global__ __attribute__((global))
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#define __host__ __attribute__((host))
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#define __shared__ __attribute__((shared))
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#define __managed__ __attribute__((managed))
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#define __launch_bounds__(...) __attribute__((launch_bounds(__VA_ARGS__)))
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struct dim3 {
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unsigned x, y, z;
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__host__ __device__ dim3(unsigned x, unsigned y = 1, unsigned z = 1) : x(x), y(y), z(z) {}
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};
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#ifdef __HIP__
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typedef struct hipStream *hipStream_t;
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typedef enum hipError {} hipError_t;
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int hipConfigureCall(dim3 gridSize, dim3 blockSize, size_t sharedSize = 0,
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hipStream_t stream = 0);
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extern "C" hipError_t __hipPushCallConfiguration(dim3 gridSize, dim3 blockSize,
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size_t sharedSize = 0,
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hipStream_t stream = 0);
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extern "C" hipError_t hipLaunchKernel(const void *func, dim3 gridDim,
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dim3 blockDim, void **args,
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size_t sharedMem,
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hipStream_t stream);
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#endif
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__attribute__((device))
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void clean_value(float* ptr) { *ptr = 0; }
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__attribute__((global))
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void add_value(float* a, float* b, float* res) {
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*res = *a + *b;
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clean_value(a);
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}
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